Products > Test Equipment
Siglent SDS1000X HD 12bit DSO's
Tankj:
--- Quote from: Muttley Snickers on April 18, 2023, 10:36:19 pm ---I believe that 150M is a typo which only adds to the confusion. ;)
An excellent comparison nonetheless. :)
--- End quote ---
Hi Muttley Snickers, it's a typo, Thanks for correction. ;)
TopQuark:
Listed on Taobao for the China market, pre-orders for now.
Priced quite competitively I think, Rigol DHO1074 is priced at 6779 RMB on Taobao.
Seems like the Rigol / Siglent 12-bit scope wars is in full swing :popcorn:
BillyO:
That looks like it will be around $1200 USD for the 1104. Not bad at all.
rf-loop:
--- Quote from: Tankj on April 18, 2023, 03:38:07 pm ---
By just comparing the datasheet, the difference between 1000X HD and 2000X HD are:
Sample rate:
1000XHD has total of 1G sampling rate capacity(1G for 1CH, 500M for 2CH, 250M for 4CH),
2000XHD has total of 4G sampling rate capacity(2G for 2CH, 1G for 4CH).
Memory depth:
1000XHD has 100Mpts interleaved or 100Mpts per channel (To be clarified) ,
2000XHD has 100Mpts per channel,
--- End quote ---
SDS1000XHD memory (Siglent published bit confusing information) will be specified / clarified later.
These need some clarifications (SDS2000X HD).
My opinion is that for avoid confusion it is not suitable to tell 4G sampling rate capacity (sum of sampling rates) because it can not use in any circumstances 4G sampling rate for signal under test. (there is not all ADC interleaving for get 4G. (There is two Ti ADC12D1000 what is single channel 2GSa (interleaved) or dual channel 1GSa (non interleaved), there is not 4G interleaving for single channel use). Also clarification for SDS2000X HD memory length. So it is perhaps better to tell dual 2GSa/s in 4 channel models.
Construction is:
Input group 1: CH1 and CH2 share one 2GSa/s ADC and one 200Mpts memory.
Input group 2: CH3 and CH4 share one 2GSa/s ADC and one 200Mpts memory.
Note: ADC run always using these full non interleaved or interleaved sampling speed independent of possible decimation what happen between ADC and acquisition memory.
If only one CH is in use, ADC sampling speed is 2GSa and memory max 200Mpts
If total two CH is use, 1 from Group 1 AND 1 from Group 2, then both channels get ADC samplerate 2GSa/s and max 200Mpts
Examples
CH1 + CH3 both channels 2GSa/s and both channels max 200Mpts
CH2 + CH3 both channels 2GSa/s and both channels max 200Mpts
CH1 + CH4 both channels 2GSa/s and both channels max 200Mpts
CH2 + CH4 both channels 2GSa/s and both channels max 200Mpts
If total two CH is use, both from Group 1 or both from Group 2, then both channels get ADC samplerate 1GSa/s and max 100Mpts
Examples
CH1+CH2 both channels 1GSa/s and both channels max 100Mpts
CH3+CH4 both channels 1GSa/s and both channels max 100Mpts
If more than 2 channels are in use in all possible combinations all channels get ADC samplerate 1GSa/s and every channel max 100Mpts
Note: these told sampling speed values are ADC speeds.
When decimation is used, of course, decimated speed depends memory selection and time axis scale but in background ADC itself run always of course full interleaved or non interleaved speed. Digital trigger engine listen always this data stream out from ADC before possible decimation.
ETA: some clarifications and typo corrections
tautech:
Following on from the great -3dB BW points in SDS2000X Plus this preproduction 200 MHz SDS1204X HD offers a similar BW headroom of some 280 MHz. :o
100 MHz Ref waveform displayed @ 1V p-p
Source = SSG3021X
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