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Siglent SDS1104X-E In-Depth Review
tautech:
--- Quote from: cichmen on January 15, 2024, 10:22:45 am ---
--- Quote from: Performa01 on January 14, 2024, 12:34:35 pm ---In order to avoid overloading the input of an SDS1104X-E, the signal amplitude must not exceed 1 Vpp.
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Is this somewhere specified?
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Datasheet P8
https://int.siglent.com/u_file/document/SDS1000X-E_DataSheet_EN04D.pdf
Vertical System>Offset Range
Performa01:
--- Quote from: cichmen on January 15, 2024, 10:22:45 am ---For my further study, would be possible to direct me where I can get more info about how the analog frontend is designed, i.e. what is the split path input buffer and why 4262 does not have it?
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David Hess has attached a very informative article about this here (reply #115):
https://www.eevblog.com/forum/testgear/how-much-noise-floor-and-other-things-matter-in-oscilloscope-usability/msg3899150/#msg3899150
In general, there is a discussion about this centered around his posting. Typical unwanted features of the split path design like very pronounced 1/f noise and awful overload recovery should have been touched there, as far as I remember.
The 4262 has only 5 MHz bandwidth. The main reason for the split path design is the increasing difficulty to make very high frequency wideband amplifiers with high input impedance and low offset drift. For only 5 MHz, classical OpAmps with reasonably good offset drift can be used.
--- Quote from: cichmen on January 15, 2024, 10:22:45 am ---
--- Quote from: Performa01 on January 14, 2024, 12:34:35 pm ---In order to avoid overloading the input of an SDS1104X-E, the signal amplitude must not exceed 1 Vpp.
--- End quote ---
Is this somwhere specified?
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No, it's not (offset compensation range is something completely unrelated), but we can test it - for instance, my tests above have proven that a signal that reaches 940 mV below the lower border of the visible screen area is still processed without oveload distortion.
We can do some calculations to estimate it; the maximum regular input voltage can be found by following these steps:
- the highest input range without attenuator is 118 mV/div.
- full screen is 8 divisions, which in turn is equivalent to 200 LSB of the ADC.
- one division is 25 LSB
- full range of an 8 bit ADC is 256 steps; 256/25 = 10.24 divisions.
- 118 mV * 10.24 div. = 1.208 Vpp for full scale.
From this, we can conclude that the internal clamps in the input buffer must be higher than 1.2 Vpp. Furthermore, we can know that the PGA (Programmable Gain Amplifier) following the input buffer will have 0 dB gain at the lowest sensitivity (=118 mV/div) and the average ADC will have at least 2 V input range. Any clamps would be set according to this.
Therefore it's safe to assume a 1 Vpp signal, which can be moved up and down by another volt by means of the offset control, will still not exceed the 2 Vpp unclamped input range.
cichmen:
Again me with question regarding this scope.
I noticed, that when I export (save) samples as binary data, I get minimum 0x03 and maximum 0xFC. I expected min. 0x00 and max. 0xFF for 8bit ADC. I tried to overload the adc, but never got anything lower/higher.
Any thoughts why these 6LSBs are lost somewhere?
kimera:
my oscilloscope SDS1104X-E
Can I read THD from SDS1104X-E FFT mode? I have some information about THD calculation from dbc calculation, but SDS1104X-E does not have dbc type. Can I convert dbm to dbc? And how to calculate? Thank you.
Performa01:
--- Quote from: kimera on July 07, 2024, 04:03:38 am ---Can I convert dbm to dbc?
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Basically, dB is a relative measure and the additional letters just signify the reference.
dBc means “dB below Carrier”; as a consequence, it is just the difference between the spectral lines of the fundamental and any harmonic signal.
That means, you can measure in whatever units you find convenient (dBm, dBV) and can always easily calculate the difference between carrier (which is the fundamental in the case of distortion measurements) and any of the distortion products (harmonics).
Here is an old screenshot that demonstrates that you can even make the scope calculate the differences for you:
SDS1104X-E_FFT_Marker_Peak_T
In the screenshot above, you can see a Marker table with Delta Amplitude/Frequency enabled. Unfortunately, this screenshot is from a quite old (2019) firmware where the DC component was still listed in the table – it shouldn’t be there nowadays.
Base line is, you need to ensure that the fundamental frequency (or carrier in other applications) is the first entry in the table. You can always use manual marker control to set marker 1 to the fundamental frequency in order to get correct delta readings for the harmonics, like in the following example with SDS2354X Plus, where the distortion products of a 50 MHz sine wave are measured.
SDS2354X_Plus_Sine_-29dBV_50MHz_2GSa
Caution: the oscilloscope frontend isn’t distortion-free either. While the screenshot above suggests that you can measure at least down to -60 dBc (= 0.1%), this depends on the settings, particularly on the exact vertical gain. Whenever you want to make a distortion measurement, you should first find an optimum setting by measuring a known low-distortion source and finding an appropriate vertical gain (using fine adjust!), where the distortion products of the DSO-fronted are at a minimum. If then your actual measurement is close to this, you know that the test object is probably better than your measurement.
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