Products > Test Equipment
Siglent SDS1x04X-E BodePlot II (SFRA) features and testings
Performa01:
--- Quote from: rf-loop on August 21, 2022, 12:35:52 pm ---Channels Skev adjustment works also in FRA (least in my old SDS1004X-E) but way Ch Skew adjust works is really poor.
Have not tested now enough, but when I found my old handwritten piece of paper ("post it") note. I tried it just but due to other things very busy only very limitedly and quikly(=error warning!).
My SDS FW is 6.1.37R8
Looks somehow (when FRA in use) that it is still so that when ADC's are interleaved (true ADC speed 1GSa/s) Skev adjust resolution is 1ns and when ADC's non interleaved mode (true ADC speed 500MSa/s) resolution is 2ns! what resolutions are really enormously too rough when we work higher frequencies (example over 1MHz. @1MHz 1ns responds 0.36 degree and @60MHz 21.6 degree what also was masured result here - naturally because time shift IS 1ns in this case.).
It need remember what are sample intervals. This is only true time resolution! There is nothing below 1ns resolution (except fine intepolation between true raw samples)
--- End quote ---
Okay, this makes sense now.
Of course, both the normal DSO operation (y-t) and the Bode Plot use the raw sample data as basis.
The y-t display uses the deskew parameter to fine positipon the trace with regard to the trigger point. The resolution for this can be as fine as we like - it's just a "graphical" operation.
Bode Plot could do the very same. Instead of positioning a trace in a graph window, it would have to add the Deskew time to the phase measurement. Really simple.
rf-loop:
--- Quote from: Performa01 on August 21, 2022, 01:18:58 pm ---
...it would have to add the Deskew time to the phase measurement. Really simple.
--- End quote ---
And because this is so simple it is totally amazing it is not already done. SDS1004X-E was Siglent first model where FRA was launched. And still this channels Skew is missing and now we live year 2022.
But then, my opinion is that it is perhaps better if we don not use oscilloscope channels Skew parameter at all in FRA, let these be scope (xt) alone.
I like if FRA have its own channels time correction adjustments (FRA channels Skew (perhaps oscilloscope channels Skew ignored)
I have couple of strong arguments for that, which I will not present in this envinronment now. I'm just saying simply that the FRA of all models needs to be develop better in terms of a few functions and UI for better usabiolity and for performance.
But naturally "first aid" simple solution is: just correct FRA phase calculus with oscilloscope user adjusted Skew (using set parameter full resolution)
Different other thing, BUG (in SDS1004X-E ) is that there is this 1ns time error related to 2 separate ADC's. This is not based to different signal travel time. It is some kind of ADC data stream handling bug in FRA. Also this can ask why this bug is still there.
gf:
--- Quote from: luciof on August 21, 2022, 10:42:01 am ---
1) I have the following setup:
generator --> 50 ohm cable --> DUT (with 50 ohm input and output Z) --> 50 ohm cable --> 50 ohm pass-thru terminator --> scope BNC
the output channel is OK; now I need to also connect the DUT input to the scope; below - say - 100 MHz, I think the best way is to clip an active probe (only 1-2 pF loading) to the DUT input.
--- End quote ---
Active probe is likely overkill here, since the loading at the DUT input does not matter. Whatever voltage appears at the probe tip, it is always the input voltage of the DUT, and the Bode plot is the ratio between output and input voltage. So the Bode plot appears as if the DUT were driven by an ideal voltage source. OTOH, loading at the DUT output does matter if the DUT's output impedance is not zero.
luciof:
Yes, you're right, I overdid it. In this case (even at the 120 MHz max frequency) a regular 10x passive probe would be enough, rather taking care to not create ground loops or other disturbances (which would be true for any kind of probing)..
mawyatt:
--- Quote from: rf-loop on August 22, 2022, 11:35:46 am ---Different other thing, BUG (in SDS1004X-E ) is that there is this 1ns time error related to 2 separate ADC's. This is not based to different signal travel time. It is some kind of ADC data stream handling bug in FRA. Also this can ask why this bug is still there.
--- End quote ---
If this is a time limitation in the FPGA, swapping the ADCs between which is first to acquire and last to acquire, then averaging the readings seems at it would eliminate this time limitation and render a average reading of the ADC samples.
Best,
Navigation
[0] Message Index
[#] Next page
[*] Previous page
Go to full version