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Sniffing the Rigol's internal I2C bus

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phersus:
Hello Guys,

Anyone who can show me what does the imx28.cfg file contain ? Or point me where I can find it ?

If the context is not clear I'm talking about the command to launch openocd, something like:

G:\openocd-x64-0.8.0.exe -f ./interface/ftdi/olimex-arm-usb-ocd-h-hl.cfg -f ./target/imx28.cfg

Thanks,
Gus

MadDog:
Hi Gus,

imx28.cfg is a part of openocd. Create your own *.cfg file like "Off" has shown in reply #3740:

source [find interface/ftdi/olimex-arm-usb-ocd-h.cfg]
source [find target/imx28.cfg]
adapter_khz 20000

I have done this some days ago with a non -H olimex adapter (olimex-arm-usb-ocd.cfg), I had to reduce the frequency to 5000kHz.

Many thanks to those who have made this possible and who have shared their knowledge!  :clap:

phersus:
Hi again,

Thank you MadDog,

Now it makes more sense those commands, I've seen them but didn't understand why they were there  :palm:
OK, if they are part of the openocd install it is clear.

I will give them a try now,

Cheers.

dr.diesel:
Looks like a new firmware available for the 815:

DSA815: 00.01.12

From:

http://beyondmeasure.rigoltech.com/acton/form/1579/0012:d-0001/1/index.htm

msraya:
No luck with the icebear JTAG  :( ...

The memory dump stop at 6542Kb, the openocd 0.8.0 output is: timeout waiting for syscomp & dbgack last dbg_status: 4
And rigup does not find any keys.

I do not have idea, I will find a solution when I have time....
The cfg files:


--- Code: ---interface ftdi
ftdi_device_desc "ICEbear JTAG adapter"
ftdi_vid_pid 0x0403 0xc140

ftdi_layout_init 0x0028 0x002b
ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010
ftdi_layout_signal nSRST -data 0x0020

adapter_khz 5000

# i.MX28 config file.
# based off of the imx21.cfg file.

reset_config trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain connect_deassert_srst

#jtag nTRST and nSRST delay
adapter_nsrst_delay 100
jtag_ntrst_delay 100

if { [info exists CHIPNAME] } {
   set  _CHIPNAME $CHIPNAME
} else {
   set  _CHIPNAME imx28
}

if { [info exists ENDIAN] } {
   set  _ENDIAN $ENDIAN
} else {
   set  _ENDIAN little
}


# Note above there is 1 tap

# The CPU tap
if { [info exists CPUTAPID] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x079264f3
}
jtag newtap $_CHIPNAME cpu  -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID


# Create the GDB Target.
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs

arm7_9 dcc_downloads enable


--- End code ---

Regards
Manuel

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