Products > Test Equipment
Sniffing the Rigol's internal I2C bus
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KK1L:
Thanks. I have disabled it based on comments of others. Averaging works in many applications to let the true signal show itself.

Yes you are totally correct that it is super easy to enable or disable features via SCPI commands. You can do it with a single :INST command if you formulate the option code correctly. I will put it back to give it a whirl....why not :)

By the way what is the Power Ana. option?
colabri:

--- Quote from: ytsejam on March 07, 2015, 05:09:21 am ---With the above setting, I was able to dump 1MB flash content.

I was confused by the design.
BF526 supports up to 4 async banks with each has 1MB address. That will only be able to provide 4 MB address in total.
However, they uses a 8 MB flash. Is the reset of the space used by FPGA?

Also, as I mentioned, if A21 ~ A19 are hard coded with 110, BF526 will only be able to access 1MB flash space in this case.
And the size of DSA800_UpdateFile.sys (firmware) is nearly 2.x MB. I believe that A21 ~ A19 must be connect to BF526 in some ways.
Or it won't be able to program the whole content of the firmware update into the flash chip.

--- End quote ---

Thanks for the information. Since Rigol doesn't provide a built-in backup function and has disabled reading the flash via SCPI I had to resort to reading it via JTAG. Took me a while to figure out the bank switching method but it was an interesting exercise.

There's some component (the ASIC perhaps?) mapped to async mem bank 3, with the relevant functionality starting at offset 0x200 bytes / 0x100 half-words (bus width is 16 bit). For reading flash content via JTAG, the following sequence is sufficient:

* write 0x0000 to address 0x20300202 (only needed once)
* write bank number (0x0000 .. 0x0003) to address 0x20300206
* write 0x0001 to address 0x20300204
E.g. with urjtag (using a BusBlaster for this example):

--- Code: ---cable KT-LINK pid=0x6010 vid=0x0403 interface=0
frequency 10000000
detect
initbus bf52x
poke 0x20300202 0
poke 0x20300206 0
poke 0x20300204 1
readmem 0x20000000 0x00100000 rigol_dsa815-flash-bank_0.img
poke 0x20300206 1
poke 0x20300204 1
readmem 0x20000000 0x00100000 rigol_dsa815-flash-bank_1.img
poke 0x20300206 2
poke 0x20300204 1
readmem 0x20000000 0x00100000 rigol_dsa815-flash-bank_2.img
poke 0x20300206 3
poke 0x20300204 1
readmem 0x20000000 0x00100000 rigol_dsa815-flash-bank_3.img

--- End code ---

I wasn't able to send commands to the flash (which is also why urjtag cannot auto-detect the flash); my guess is that the same component that's handling the bank switching is keeping WE# high by default. The firmware does a lot more writes to async mem bank 3; I haven't tried figuring out which one enables "write" access to the flash.

HTH.
davorin:
Good afternoon (o;

Just received my DS1074Z Plus today....and after powering up and listing the options I see that all options show as version "Official"....

So does this mean there isn't anything left I can unlock on this scope?
Or what options are left for this scope to add? Only the 100MHz bandwidth?


thanks in advance
richard
hammy:

--- Quote from: davorin on May 25, 2021, 10:21:57 am ---Or what options are left for this scope to add? Only the 100MHz bandwidth?

--- End quote ---

Exactly. That's the only option missing.
davorin:
Hmm..no luck with J-Link and openocd on Debian linux:


--- Code: ---me@blender:~/develop/openocd$ sudo openocd -d1  -f  interface/jlink.cfg -c "transport select jtag" -c "adapter speed 6000" -f target/imx28.cfg
Open On-Chip Debugger 0.11.0+dev-00179-g4e872a797-dirty (2021-05-26-11:07)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
debug_level: 1

jtag
adapter speed: 6000 kHz

dcc downloads are enabled

Error: JTAG scan chain interrogation failed: all zeroes
Error: Check JTAG interface, timings, target power, etc.
Error: Trying to use configured scan chain anyway...
Error: imx28.cpu: IR capture error; saw 0x00 not 0x01
Warn : Bypassing JTAG setup events due to errors
Error: unknown EmbeddedICE version (comms ctrl: 0x00000000)

--- End code ---

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