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Some old school instruments showing how it's done (HP 3325A and Fluke 8506a)

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SilverSolder:

No, I haven't dug that deep - I have been resisting that particular rabbit hole, but all the other rabbits are starting to push me in!  :D

dietert1:
OK, here is how the RAM code initiates in the 8502A.

Meanwhile i also tried to bring the disassembly to a format that assembles successfully.
When looking at gaps in the disassembly that appeared like unreferenced machine code, i found jump tables with about 60 more code references, implementing switch statements (computed jumps and computed calls). Appears like a state machine. Did not find p-code until now, but there are more code gaps and a lot more ROM data to look at.

Regards, Dieter

joeqsmith:
Thanks.   

Looking at the hardware, the serial board sets ID2 during an interrupt.    On the controller, this routes to U21 priority encoder 14532.   The encoders Q outputs route to U13 inverting driver 74240, which drive the 8080's D3-5.   So when ID2 is set, the encoder puts out a 011 on Q2..0.  This is inverted to 100 on 8080s D5..3, so vector 0x20 (RST4).   So it makes sense that the RST4 certainly plays a big part in the serial communications.   It's always good when things make sense.

If that's right, I believe the external trigger would use RST5 which is also run from RAM.     

I suspect the transmit side polls the status register checking the transfer flag during the timer interrupt.   There is one more test I can run to try and prove this out.

Can you tell I'm avoiding the logic analyzer like the coronavirus.   :-DD  Just trying to make sure I have some idea what I am looking for before diving in.

joeqsmith:
Using the cheap programmer to sniff the RAM. 

joeqsmith:

--- Quote from: dietert1 on March 03, 2021, 04:38:46 pm ---Appears like a state machine.
--- End quote ---

It's been a bit of a trip playing with such an old processor.  I had long forgotten just how odd it was.  Just having small sections of interrupt code rather than vectors, and having to force the address onto the databus... just some crazy ideas from the past.     

Looking at the RAM areas containing the interrupt code,  I was hoping that they would just initialize these areas of the RAM and were done with it.  I could then just search for that section of code and focus on the part I am interested in.   

I was guessing they were doing this for speed but now I have a sinking feeling that part of the reason they used this over the ROM was they wanted to be able reprogram the interrupt.  It looks like they reprogram the these areas during runtime.   

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