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Tektronix TDS744 CRT to LCD color converter FPGA module DIY
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spo256al2:
Hello,
This topic describes LCD color converter FPGA module experience for broken CRT on TDS544 TDS724 TDS744 TDS754 TDS784
 I bought on ebay a TDS744A tektronix oscilloscope as a part. As often this scope as a weak brightness CRT and it is very difficult to find a new CRT. On the net some users have changed the CRT by LCD. They use analog scope VGA output to send signals to a Chinese board which converts analog signals in digital signals to LCD display… Perhaps a more direct solution can be used by taking digital signals directly from the RAMDAC scope. I saw that a company did it. But I thought it was the right time to have my first experience with the FPGA by building my own solution.

It is easy to find service manual and schematic on the web , thanks to kO4BB download - KO4BB. As TDS7XX family as very near hardware as TDS520B, I used the TDS520B schematic for my TDS744 experience.

There are 60 frames per second. Each frame contains (visible) 480 lines of 640 pixels.  A pixel is build by  mixe 3 primary colors: Red, green, and blue. By modifying the intensity of these primary colors, you obtain one the pixel of the color you want. As an artist on his wood palette with watercolor. 
To build the frame, the scope uses a video RAMDAC chip: BT471 or ADV471. The datasheet gives most of the information you need and the TDS 520 schematic gives the rest.

The BT471 use color palette and overlay palette loaded in dedicated RAM and digital to analog converter to output VGA signal.
To display a frame, the scope separates the picture into two types of elements one is curves ( Named overlay palette in BT471 )and all of the other stuff as grid, index, buttons… (named color palette in BT471). The scope displays either the curves or the other stuff.


In the BT471 each color palette or overlay palette uses  3 registers of six bit length: one register for Red, one register for Green, one register for Blue. There are 256 colors palette in the BT471, so 256 registers form a RAM bloc for each primary color and 15 RAM bloc for overlay palette. There is a pixel mask register in BT471 but it is not used in the scope. The scope set all Pixel bit mask register to ‘1’.

So, to display a pixel, the scope sends to the BT471 the address of the color or overlay and the BT471 DAC convert in analog to display the pixel.
At startup, the oscilloscope fills the entire palette with colors and overlays. All this is sent to the BT471's data bus. There is only one pixel mask fill sequence, followed by the address of each pixel with a value for each of the three primary colors, red, green, and blue. BT471 internal logic handles this sequence to load RAM

The scope hardware limits the color palette to 16 colors and 15 colors for the overlay. 
To use an LCD display we roughly need to get the color data from each RAM output, before the DAC. As this possibility is not given by the BT471 RAMDAC, the idea is to sniff the pins RAMDAC and emulate the RAMDAC by a FPGA and send the pixels to the LCD.
To emulate the RAMDAC by a FPGA I reproduce the internal functions of the BT471 : Pixel mask, color address, red, green, blue color registers, RAM blocs, and internal logics. The internal logics was done in Finite State Machine
The FSM is use at the start up to write primary colors into each RAM bloc.
 Function_diagram.pdf (329.56 kB - downloaded 145 times.)
For the FPGA I used an Xilinx Spartan XC3S200 development module (bought in suplus) and I built a PCB to plug the dev board on the BT471.
As the first design PCB was several times modified, it is very dirty and there is colors error intermittently. So, I am drawing a new PCB design.

Here a link for the youtube video https://youtu.be/v6Kjz3UYjVk



At the video starting you can see the yellow LED for the loading RAM from the finite state machine.
I learned VHDL to build this project and I'm sure I didn't respect the state of the art. Bear with me.

Vincent

nctnico:
That is neat. I like the way to use the QFP socket to connect a chip to an existing board. I never thought of that. I did something similar in the past but using a fixed palette by taking the 5 bit color data that goes into the RAMDAC.
spo256al2:
Hello,

To nctnico. Yes !!! I built your design and I studied your code and I did a PCB. It ran Thanks.

At the moment I am working on a new PCB with my solution.
Below it is my VHDL source code according to the hand drawing diagram on the last post

RAM_DAC.vhdl is the "main"
FSM.vhdl
MUX_4.vhdl
PIX_MASK.vhdl
RAM_VIDEO.vhdl
REG_8.vhdl
RAM_DAC.ucf is the constraint file for XMF3_g_200 FPGA module with XC3S200 xilinx from PLDkit low cost module compagny.
I know that module is obsolete but with the code source you can use it, on a spartan 7 or other FPGA

The display used is  a 640x480  G065VN01_V1 I bought it on ebay and the inverter to Aliexpress

Vincent
TERRA Operative:
Ooh, I am interested in this!
I have no programming experience, so I can't help with that bit, but I am interested in replicating it myself once it's working. :)

Is the LCD you used a good fit, and does the image line up with the side and bottom buttons around the display?
spo256al2:
Hello Terra,

I just receive the PCB board you did for testing my intermitenly faulty TDS PSU  !!



Yes, the LCD fit all right, I chose its size to fit direcly in place of CRT.
I plan to power the LCD and FPGA PCB module with the 21 volts from the microprocessor board. This 21Volts is used to power the CRT assembly

Vincent
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