UNI-T UTG932/UTG962 200MSa/s Function Arbitrary Waveform Generator

[Serg_D]

FM signal with CH 1 @ 50MHz modulated by a 400Hz tone and a deviation of ±75KHz]

I tried to set these parameters on my UTG962. Everything works.

[Quarlo Klobrigney]

I believe you but can you post a screen shot?
I just have to make sure that it is as you say because I want to make sure that the specifications are actually understood and not lost in my translation from my head to text. I have to convince some other people to invest in the UNI-T. Thanks.

By the way Tony you're an evil man. I watched you tear open a perfectly good "Ziplock" bag to get at the accessories for that UNI-T. Just my OCD kicking in!
After a careful review and magnification, you in fact tore open a heat sealed bag. No zip bag crime was committed. I stand corrected


I don't need the external 10MHz accuracy that you seem to have perfected. Just "analog accuracy" but thanks for the videos.

[IAmBack]

Another comparison of Siglent Sdg2042x and UTG962, with spectrum analyzer. UTG exhibits extra "spikes", confirming my earlier  time-domain tests.

[Serg_D]

I believe you but can you post a screen shot?

[Quarlo Klobrigney]

Wow that works! Thanks for providing the screenshots, especially the last one.
I'll order mine tonight as far as the others, I will forward them the successful setup you provided.
They will be on their own to order theirs.

[BugCatcher]

Very interesting!

The spacing of the unwanted spectral lines ("spikes") is about 750kHz. The fixed switching frequency of the onboard XL6008 DC/DC converter is 400kHz (320 ...480)  -> no AM modulation due to supply ripple!

I'm back to my old theory:
A DDS-core has two key parameters
- clock speed (e.g. 200MHz for UTG962)
- frequency resolution
The second one is defining the required word length of the phase accu. There is a simple (nasty?) trick to relax this requirement
- reduced word length of the phase accu (e.g. by 8bits)
- implement a switching between two frequency words (equivalent to phase increment). The difference is equal to one LSB
Let's map this to the UTG962 device:
a realistic implementation could be
- switching frequency   200MHz/256  =  781.25kHz (equivalent to a 256 clock cycle)
- fine-tuning is applied by the duty cycle of the switching signal (8 bit additional frequency resolution)
The result is an "average frequency" with higher resolution. The price you have is pay are the additional side lobes / spectral lines due to FSK modulation.
If we claim the additional spectral lines as harmonics, then we are still within the UTG962 spec ... BINGO !!!

Keep in mind that the UTG962 is a low cost entry level device!

          ===   You get what you pay for!   ===

PS:   Please verify the spacing of the spectral lines. Do we really have 781.25kHz? 
        Small change of frequency should result in different amplitudes of the unwanted spectral lines. Can you confirm this?   
     

[IAmBack]

I can do further measurements in a 2..3 weeks.
To be clear, I really like UTG. It is very useful tool (good enough not only for Australia   ). I noticed these "feature" when I wanted to plot Lissajous figure on the scope, and was not able to get stable image, and wanted to figure out "wth" is going on.

[BugCatcher]

One comment regarding "instable Lissajous figures"
This effect has a partially deterministic root cause. The frequency grid of the "human interface" is in steps of e.g. 10mHz or 100mHz.
The DDS-core has a step size of   f-clock / 2^ "word length of phase accu"    -> need for mapping/quantization
This would explain a "smooth drift"  ... not the observed nasty jitter!

example:
  f-clock = 200MHz
  32bit word length
  ->   step size = 200MHz / 2^32 = 0.046566... Hz
  wanted frequency (entered via "human interface")   10 100 000.0Hz
  assuming correct arithmetic and rounding would result in an
  frequency error of -0.021Hz   (relative error  -2.1e-9)

  btw: in combination with an GPSDO you can achieve a "stable"
         but not a "bang on correct" frequency!

Examples for the Lissajous figures:
   Channel 1:   10MHz
   Channel 2:   5, 15, 20, 25, 30, ...   MHz
   -> all frequencies are impacted by the above rounding/quantization -> all figures should drift!


After checking the available photos of the PCB of the UTG962 I could find another potential root cause for the unwanted "side bands".
Close to the crystal oscillator (marked "B10QT"  ... no data found) is a cluster of passive elements. Under the assumption that this oscillator is voltage controlled, these elements could be a low pass filter for a PWM signal (factory calibration!). A 8bit PWM@200MHz with insufficient low pass filter could also cause the observed side bands!

[Quarlo Klobrigney]

I wish I could do any measurement. My delivery date is way out till September.
The Pacific ocean must have dried up.


Quote from: IAmBack on 2021-07-31, 15:56:14

I can do further measurements in a 2..3 weeks.

[de_light]

Interesting that you could effectively 'unlock' the 60MHz option. Have you tested the device at these frequencies after being unlocked?

[ed1380]

if anyone is on the fence it's $109 on ali for a few more days.

[de_light]

Is an alternative firmware being developed for this?

[Johnny B Good]

@tonyalbus

 Harking back to your posting in May (reply #208, page 9), a cost effective solution to generate the required 50MHz from the 10MHz external reference would be to use a 3N503 clock multiplier chip to generate a 3.3v logic level low jitter 50MHz clock.

 If (a big 'if' in this case) the 50MHz XO chip is using the 4th pin as an EFC input to allow recalibration via a hidden option in the UI, as is the case with the SDG1000X and SDG2000X series of Siglent AWGs, this offers you an even cheaper option to phase lock the internal oscillator to your 10MHz reference using a 74HC390 and a 74HC86, saving on the relatively high cost of a 3N503, neatly avoiding the change-over switch and any need to power cycle the generator to effect changes between the internal and external sources.

 When I was contemplating how best to add an external reference socket to my much modded FY6600-60M after having first removed its crappy 50MHz xo chip (struggling with a 25W Antex and breaking its output pin in the process - nice work with the hot air gun, btw - thinking, "Well, that'll be one bit of electronic waste that's going to do more good than harm by going into 'land-fill' and good riddance too!") to upgrade to a 50MHz 0.1ppm TCXO oscillator board which I then upgraded to a 10MHz OCXO feeding a 3N503 soldered into the vacated xo location, as per Arthur Dent's contribution to the FY6600 topic thread (reply #144, page 6) this issue of the FPGA locking up by using a mechanical change-over switch became my over-riding concern.

 An article I'd seen on injection locking a Wein bridge oscillator reminded me of the susceptibility of oscillators in general to such accidental injection locking through careless circuit layout and/or lack of power rail decoupling which inspired me to experimenting with this method of locking my OCXO to the external reference to avoid disrupting the FPGA's clock, eliminating the change-over switch and any need to power cycle the generator.

 If I had procrastinated just a little more, as I usually do, It may have dawned on me that the OCXO I'd installed could be phase locked to the external reference to achieve this goal of automatic glitchless change over between the external and internal clock references and the title of my

 "Injection locking the 10Mhz OCXO to external reference (upgrading a FY6600)"

 topic thread would have been something like,

 "Phase locking the 10Mhz OCXO to external reference (upgrading a FY6600)" instead.

 All I can say is that I did get this to work (and quite nicely at that) but I would suggest that the PLL method would be the better way to go since there's no need to incorporate a 45pf trimmer to fine tune a simple series resonant crystal filter element or to optimise the injection signal level as I'd had to do with my own injection locking project.

My initial concerns over dealing with the PLL's effect on the manually trimmed EFC voltage in the absence or loss of the external reference frequency turned out to be baseless in the case of an XOR based phase detector. As per usual, I had overthought the problem, neglecting the simple charm of an XOR based PLL as described below.

 Under such conditions, the output of this simple phase detector circuit after the LPF (loop filter) will revert to a mid voltage output. This can be fed to the EFC pin via a resistor (the resistor in the RC LPF will usually suffice in this case) and as long as the trimming pot has a highish impedance, the PLL output under locked conditions simply adds or subtracts a control voltage to the manually set voltage from the calibration trimpot which usually needs to be well padded out anyway (neatly fulfilling the 'highish impedance' requirement) in order to permit the very fine adjustments, typically called for in the case of an OCXO, to be realised with reasonable ease.

 The main motivation for upgrading these FeelTech AWGs to an internal OCXO seems to have been the 14 digit frequency display permitting adjustment in μHz increments throughout its full frequency range (I've already verified that the last digit of adjustment is real rather than merely cosmetic as one might be tempted to believe to be the case in such a cheap Chinese "toy AWG").

 In fact, after testing the SDG2042X 10MHz sine output frequency accuracy against its external 10MHz reference input, I have a strong suspicion that the FeelTech is a clone of the Siglent's FPGA and firmware since they both show the same 1 second of drift per 1.8 milion years rounding error for this 'non magical' output frequency.

 From the observations made here, the UTG932 is clearly not in the same league as far frequency setting resolution goes (the nine digit frequency display is not the cause but merely the consequence of the lower resolution available from the FPGA's firmware in this case).

 I think the main appeal of the UTG932 over the FY6900-60M despite its technical shortcomings, is its 'Cuteness' and the fact that it isn't a FeelTech/FeelElec product.

[Johnny B Good]

still that 50 MHz is not convenient for ext. ref.

maybe future task will be 5X PLL from 10MHz rubidium of GPSDO ref

 Were you thinking of the 3N503 clock multiplier chip by any chance? 

[Johnny B Good]

no affordable battery afaik that you can put in a UPS that can last 31yrs, not even close.

 What! Not even an LFP battery pack? 

[Quarlo Klobrigney]

It has arrived and the menu is a bit more convoluted compared to the FY6900 structure.
It works and does broadcast FM at the proper deviation as expected.

WHERE is the menu setting for saving custom setups! No where to be found. Really?

Quote from: Quarlo Klobrigney on 2021-08-11, 00:40:21

I wish I could do any measurement. My delivery date is way out till September.
The Pacific ocean must have dried up.

[Quarlo Klobrigney]

I am not impressed. The generator is utterly useless.
My 2 FY6900's are light years cleaner that this piece of junk.
The trash that this thing produces is off the scale.
I use the FY6900 to align vintage radios and it is fairly clean.
This thing when just the ground is attached to chassis ground causes the DUT radio to receive trash. Hooking the thing up to the antenna or other points obliterated the fundamental generated frequency. Now...how do I get a refund?

[Johnny B Good]

@Quarlo Klobrigney

 The usual way to get a refund is simply to advise the seller that the item as supplied is "not fit for purpose" and give them a chance to resolve the situation amicably. Since I don't know from whom you purchased this, I've no idea how successful this will be but, if they feel they have a reputation to protect, they should either offer a replacement or a full refund according to your preferred solution.

 On the thankfully few occasions that I've had to claim a replacement or refund from ebay sellers, the process has usually been straightforward and even Banggood have been little trouble in obtaining similar refunds on DoA kit.

[Quarlo Klobrigney]

With Banggood, it's all about the deniability.
That's why I haven't ordered from them for 2-3 years now.
Fool me once shame on me for trusting you.
They shoved it deep on the last order back then.

I don't suppose Aliexpress, now that the time is up in the shipping, let alone testing, will be any better.
I once had "show us the missing pieces in a photo" You can't make this stuff up....
I just wish someone here could test the device as I used it, see the garbage emanating as I did, in order to have corroboration for my return story....

[Johnny B Good]

 Well, if it's just the noise that's an issue, the problem may simply be down to its supplied 5 volt 2A usb wallwart being a particularly noisy example. The supplied power lead is the rather useful USB A plug to barrel plug which allows you to test it with any of the commonly available 2.1A USB wallwarts or even a battery bank.

 If swapping to a different 5v DC power source affords any reduction in the noise, it might be worth rigging up an analogue 5v 2A rated voltage regulator powered off a 12v SLA to eliminate any questions over switching noise content in all the smpsu based sources of 5 volt DC power you may have to hand.

 Cheap 'n' Cheerful alternatives for time limited testing purposes could be a 6v lantern battery with a Si diode dropper or a three D cell heavy duty carbon/zinc or alkaline battery pack which should provide 4.8v when a fresh pack is used. Just check what voltage you actually obtain with a 10 ohm dummy load before plugging it in. The standard voltage tolerance for most 5v kit is +/-10% (4.5 to 5.5 volt range) so this sort of battery should allow you to safely test without having to consider the imponderable issue of switching noise.

 The problem might simply be the supplied wallwart being a particularly shitty one. Perhaps it's simply missing the Y cap that returns the switching noise that's capacitively coupled from the high voltage primary across to the secondary of the step down/isolation transformer back to its origin to save it taking "the scenic route" via whatever its plugged into. This is the component that gives rise to the infamous half mains live "touch voltage" that afflicts all of these class II smpsu DC power supplies (typically wallwarts but also including the psu boards used in the Feeltech FY6600 models onwards, as well as their earlier FG models).

 If the supplied wallwart proves to be the culprit, you'll probably have an easier time in persuading your supplier to ship you a replacement wallwart rather than having to ship out complete UTG962 or provide a full refund on return of the rejected kit.

[Labrat101]

You can just connect a ground wire to the top BNC of UTG962 outer case. this is what I do it seems to solve stray noise from the generator when working on delicate equipment.  The supplied power unit is not over good . .
Most of the time I run though an isolated power supply..

[BugCatcher]

Few days ago, I received my UTG962E ...

Here are the results of my first investigations

1)  could confirm the video-loop from IAmBack (Replay #236 June 25, 12:50 pm)
    - second reference was my old MHS5200A  (26bit DDS-core claim 200MHz, but running at 176MHz)
    - next step was a frequency measurement over time (10s gate time)
        -> observed instable results
        -> did time sequence for UTG962 and MHS5200A   picture: 20MHz_frequency_drift_comparison
           what can we see
           - frequency counter is good enough
           - MHS5200A is showing smooth frequency drift during heating up
           - UTG962 WTF ...
2)  let's do to frequency domain
    - FFT on my Rigol scope  ... no chance to see anything
    - my Perseus SDR (in spectrum mode) ... BINGO
        -> could see the unwanted side-bands (spacing approx 720kHz, not a function of carrier frequency)
           First conclusion:  this is not 200MHz/256!
           Second conclusion: can't be a simple PWM for crystal tuning
           Third conclusion:  must be an "internal algorithm"
           picture: spectrum_35MHz
    - checked also my old MHS5200A:  clean spectrum with reduced SNR (due to 12bit DAC) no side-bands at all!!!
3)  check the precision of frequency steps
    - how to do with an "instable signal"?
    - simple solution:   scope in X-Y mode and a hand operated stop-watch
      keep in mind: we have a dual channel function generator with same reference for both channels
      - set both channels to the same frequency (e.g. 50MHz)
      - check the scope for a stationary 1:1 Lissajous figure
      - offset one channel by e.g. 0.1Hz -> you should see one period in 1/0.1Hz = 10s
      - measure the time for multiple periods with your stop-watch
        -> very precise results with nearly no effort!
        Conclusion:  UTG962 looks perfect!
      - final: drift investigation with other frequency ratios:  1:2, 1:3, 2:3, 3:5, 5:7, ...
        - you get stationary figures
        - no change after 10 minutes   -> really perfect!
4)   the big question: what's going on?   ... let's investigate the carrier and the side-bands
     - Perseus in SDR-Radio mode, SSB-demodulation of a 25MHz carrier
     - wanted carrier:    sounds good, looks good                   picture: Carrier_25MHz
     - unwanted carriers: sound terrible (noise), look terrible     picture: first_sideband_25MHz
5)   compare the level of the unwanted signals with the spec of the UTG962
     - measured the level of the first unwanted side-band against the level of the wanted carrier
     - my Perseus is limited to 40MHz (14bit@80MHz ADC)
          picture:  sideband_dBc-versus_frequency
     - my problem: if you claim that the unwanted side-bands are harmonic, then my measurements are "close" to the specs (not really!)
           My concerns:  "harmonic" distortions should not impact frequency measurements
           They claim at 10MHz a phase noise below -125dBc/Hz @ 10kHz offset. What's the value of this statement? The devil sits at multiple of +/- 720kHz!             


My summary:

On the positive side
- compact device with impressive functionality and build quality
- easy to work with (graphical human interface with high resolution screen)
- good enough for at least 99.9% of all typical function generator use cases
- this is an entry level device with an excellent price/performance ratio

=> I will use this device  (my MHS5200A and a 50 years old Wavetek are now retired and in passive stand by)

On the critical side
- they invested enough to achieve an excellent frequency resolution
- they had limited resources to keep the unwanted side effects of the first point under the visibility limit (noisy side-bands)
- assume that a better (state of the art?) solution would require a more expensive FPGA
- performance could be critical for applications like precise reference clocks or measurements with highly selective filters

and on top
- there are many happy users ...  and  ...   it was hard to catch and analyze the impairments ;-)


PS:   comment regarding complaints from Quarlo Klobrigney
      - I confirm Labrat101 statement
      - had similar problems ... root cause was always lousy grounding (e.g. bad BNC-connections or cables)

[BugCatcher]

sorry, I lost 4 pictures ... will retry

[BugCatcher]

missing pictures

[Labrat101]

@ BugCatcher
Nice work .    Had no complaints with my UTG962 for the price to performance 
 The power supply is a bit noisy easy fix  .  & Earth