Author Topic: USB Logic-Analyzer (sorry, long)  (Read 29154 times)

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Offline 0xdeadbeef

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Re: USB Logic-Analyzer (sorry, long)
« Reply #25 on: November 28, 2011, 07:30:10 pm »
Well, there are things like CAN, LIN, FlexRay that I can really use at the job. Also stuff like JTAG and USB that might come handy. Compared to that, the range of protocols available for the OLS is pretty basic.
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Offline longpole001

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Re: USB Logic-Analyzer (sorry, long)
« Reply #26 on: April 26, 2012, 10:58:01 am »
hows is the zeroplus EEprom patched , using windows 7  , i done the USBport.dll patch on a c16032 to make it a c16128  and it works ok , which is fine till the next update and ill have to do it again

Also is these away to add the other 16ch as i believe  the internal chip gnds these inputs now ( manufactire date was oct 2011 and adding the extra 16 channel  hardware would not be able to be used

Cheers

 

Offline 0xdeadbeef

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Re: USB Logic-Analyzer (sorry, long)
« Reply #27 on: April 26, 2012, 04:31:54 pm »
Patching the EEPROM is no problem under Win7. I can provide you with the tools if you wish.
Yet AFAIK updating to 32ch was only possible with an early HW revision.
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Offline longpole001

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Re: USB Logic-Analyzer (sorry, long)
« Reply #28 on: April 28, 2012, 01:14:00 pm »
Hi , yes love to get the tool to update eeprom using  win7,

as far as the extra 16 channels for the zeroplus , further entries on hackaday site indicate that the current versions are up gradable ( assuming you add the parts) , but the hard bit seems to be that 2 pins referring  to the post on hackaday have been cut off at the asic , checking my unit i found 4pins missing , they are not impossible to resolder on but you better be very good and have a very steady hand and not over heat the asic while tring .

again from the post it indicated 2 pins cut off access the memory above 32k , which sort of makes me think that although the patch in the software says it can use 128k , it cant really if those pins are not in place

something that anyone who is doing the "upgrade" would need to confirm

 

 

Offline free_electron

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Re: USB Logic-Analyzer (sorry, long)
« Reply #29 on: April 28, 2012, 01:23:46 pm »
Take a look at chronovu. They approach this different from the 'streamers'. They have the acquisition memory on board.
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Offline 0xdeadbeef

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Re: USB Logic-Analyzer (sorry, long)
« Reply #30 on: April 28, 2012, 03:26:00 pm »
Hi , yes love to get the tool to update eeprom using  win7,
I uploaded the full package here:
http://www.sendspace.com/file/e1zxu0

as far as the extra 16 channels for the zeroplus , further entries on hackaday site indicate that the current versions are up gradable ( assuming you add the parts) , but the hard bit seems to be that 2 pins referring  to the post on hackaday have been cut off at the asic , checking my unit i found 4pins missing , they are not impossible to resolder on but you better be very good and have a very steady hand and not over heat the asic while tring .
Honestly, I haven't looked deeper into this. 16ch are good enough for me - usually I use less than 8.

again from the post it indicated 2 pins cut off access the memory above 32k , which sort of makes me think that although the patch in the software says it can use 128k , it cant really if those pins are not in place
Well, I sure can access the whole RAM without any HW change. It is clearly visible that the measured buffer increases when increasing the "RAM size" parameter from 32k to 128k that it's filled with valid values.

Take a look at chronovu. They approach this different from the 'streamers'. They have the acquisition memory on board.
Neither the OLS nor the Zeroplus are Streamers. E.g. the Zeroplus has a 4.5MBit Highspeed SRAM.
The ChronoVu seems to have cheap DRAM on board (and also a CPLD instad of an FPGA), so I guess that there's catch. On the one hand, obviously they save bandwidth by only supporting 8 channels, but probably there's more to it. Probably there's a small highspeed cache on the CPLD and they rely on the fact that not too many edges occur in a given time, so they have time to transfer the data to the DRAM.
Anyway, the HW looks pretty lowend and the GUI is _very_ basic. No comparison to the ZeroPlus GUI.
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Offline longpole001

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Re: USB Logic-Analyzer (sorry, long)
« Reply #31 on: April 29, 2012, 05:07:16 am »
thanks for the file  , i have ordered the bits to upgrade the 16 to 32 , note to others the TI 7416ABT245b GGP package  in the upgrade is  avail from rs components   

be interesting to see if it works more so with all the protocols


cheers
sheldon
 

Offline KedasProbe

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Re: USB Logic-Analyzer (sorry, long)
« Reply #32 on: July 16, 2012, 07:29:10 pm »
@longpole001

Did you do the update, and does it work as expected?
Which serial number did you use to register? (I assume they know which serial number belongs to 32 or 128)
Not everything that counts can be measured. Not everything that can be measured counts.
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Offline 0xdeadbeef

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Re: USB Logic-Analyzer (sorry, long)
« Reply #33 on: July 16, 2012, 09:20:00 pm »
I even registered my 16032 as 32128 by mistake. I can't use the missing 16ch of course, but registering worked without problems - despite the serial number containing the string "032".
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Offline mrflibble

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Re: USB Logic-Analyzer (sorry, long)
« Reply #34 on: July 21, 2012, 11:36:58 am »
...  In my case, there was a 2.x software, not the "Demon Core" with advanced trigger possibilities. Then again, there is still no GUI for them, so it doesn't really matter so much.
In theory, updating the software should be easy (e.g. starting a batch file). My bad luck was that I got a (not really so) new hardware revision with a different EEPROM which was not supported by the tools. Should be fixed by now though.

As it's been a while since this post, do you still use the 2.x firmware? Or the demon core? Any chance of the newer trigger options being supported in software by now?

The reason I ask is currently I use the older firmware version, or rather a slighty hacked version of it. I run it on a nexys2 board, so I took a version where someone already did all the hard work for me. ;) Then mainly did a few quick fixes to get a different pinout, added some pullup constraints on the pins, add some differential inputs, add sychronizer to uart to fix some non-valid assumptions in the original :P, and added some more BRAM for sampling. Then I used the leftover 2 brams for a small chipscope ILA instance to get me some more triggering options. So basically chain the ILA trigger out with the SUMP original, or run in parallel for debugging. That way I can check if the SUMP trigger thing is doing what it should be doing. So far so good.

Now while that's all nice and useful for me, it's not very useful for anyone else. So I thought I'd see if I could do some improvements on the 2.x version triggering. Lucky for my laziness someone else (dogsbody) already did the work in the form of that demon core. And even more luck ... it's in verilog (my vhdl really sucks :P ).

So right now I'm looking at changing the demon core so that it'll work on OLS hardware and nexys2 hardware, selectable by synthesis parameter. Whoever thought to put partial opcode decoding right in the uart/spi? O_o Anyways... it would be interesting to know if you and others use the 2.x version or the demon core?

Quote
And yes, 24kByte is really not so much. You probably don't want to use it without compression. Unfortunately the compression is pretty basic. In either 32, 16 or 8bit mode, one channel is lost since this bit is used as RLE token marker. Then a 2nd dword, word or byte is stored with the number of identical patterns. So in 8bit mode, the algorithm needs to store two bytes after 256 identical patterns, in 16bit mode it has to store two words after 65636 identical patterns and in 32bit mode two dwords after 4294967296 identical patterns.

Yeah, the RLE in the original SUMP is ... curious. That's another reason I'd like to use that demon core, since it looks better in that regard. Or maybe I'm just biased because I'm more familiar with verilog, dunno.

Quote
... But hey, it's just 50 bucks and in theory, it has the best trigger possibilities of all affordable LAs. And you might actually be able to use them some day in the future :)

Indeed. So since it's 2012 by now I was wondering if you or anyone else was using said triggering?
 

Online amyk

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Re: USB Logic-Analyzer (sorry, long)
« Reply #35 on: July 21, 2012, 12:28:29 pm »
On a related topic, Cypress has a USB 3.0 equivalent to the old FX2LP in the Saleae and related clones:

http://www.cypress.com/?id=3526

It would be interesting to see when/if someone makes a logic analyser using it, although it is currently still a bit expensive.
 

Offline mrflibble

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Re: USB Logic-Analyzer (sorry, long)
« Reply #36 on: July 21, 2012, 01:16:32 pm »
I assume you mean the FX3 for fast usb transfers? At ~ 32 euro at mouser/digikey it's doable, but the bga-121 package might thin the herd of potential "someones" to DIY a prototype. Besides, you'd need a good reason to justify the price increase. More bandwidth is always better and all that, but does the current OLS version even use something approaching usb2 bandwidth?

Or maybe you mean it more general. In which case I look forward to trying one of those Kintex-7 + FX3 based analyzers. :) Well okay, maybe just spartan-6 then.
« Last Edit: July 21, 2012, 01:20:32 pm by mrflibble »
 

Offline 0xdeadbeef

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Re: USB Logic-Analyzer (sorry, long)
« Reply #37 on: July 21, 2012, 02:51:17 pm »
As it's been a while since this post, do you still use the 2.x firmware? Or the demon core? Any chance of the newer trigger options being supported in software by now?
I updated to Demon Core directly when I got it, What I described was the issue of the update process failing on my HW revision of the OLS and me having to do some trickery to get it done.

... it would be interesting to know if you and others use the 2.x version or the demon core?
...
So since it's 2012 by now I was wondering if you or anyone else was using said triggering?
So my OLS has the Demon Core on it since several months but the last time I had a look, the OLS GUI still didn't allow to use any of the advanced triggering features and continued to have some annoying bugs and missing features. A least it's still under development, so there's probably a chance that the trigger dialog is reworked some day.


Yeah, the RLE in the original SUMP is ... curious. That's another reason I'd like to use that demon core, since it looks better in that regard. Or maybe I'm just biased because I'm more familiar with verilog, dunno.
From what I can tell from a user's perspective, the RLE encoding of the Demon Core is exactly the same as it always was.
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Offline mrflibble

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Re: USB Logic-Analyzer (sorry, long)
« Reply #38 on: July 21, 2012, 03:07:46 pm »
So my OLS has the Demon Core on it since several months but the last time I had a look, the OLS GUI still didn't allow to use any of the advanced triggering features and continued to have some annoying bugs and missing features. A least it's still under development, so there's probably a chance that the trigger dialog is reworked some day.

Bummer, I was kind of hoping that I was just blind and missing the magic buttons...
 

Offline Rasz

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Re: USB Logic-Analyzer (sorry, long)
« Reply #39 on: October 15, 2012, 06:02:16 am »
I assume you mean the FX3 for fast usb transfers? At ~ 32 euro at mouser/digikey it's doable, but the bga-121 package might thin the herd of potential "someones" to DIY a prototype. Besides, you'd need a good reason to justify the price increase. More bandwidth is always better and all that, but does the current OLS version even use something approaching usb2 bandwidth?

Or maybe you mean it more general. In which case I look forward to trying one of those Kintex-7 + FX3 based analyzers. :) Well okay, maybe just spartan-6 then.

I think he meant expanding on USBee/Saleae idea. Using FX3s GPIF II to pump raw 32 bits at 100MHz and let sigrok.org take care of the rest (triggering).
We could end up with ~$50 (CYUSB3012-BZXC $28 + pcb and 245 buffers) data logger comparable to >$100 commercial ones.
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