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Where is the Keysight Megazoom V ASIC?
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nctnico:
I still can't shake the feeling that Keysight has hit a dead-end with their ASIC architecture. The DSO landscape has changed to much in the past decade alone. Remember when Keysight introduced frequency analysis on their DSO? Siglent copied it within weeks and 2 years later it is standard on about every DSO model you could buy.
wraper:

--- Quote from: 2N3055 on February 12, 2022, 10:56:10 am ---OK, fair enough, please explain what do you mean by : "Performance of Zinq based scopes fall flat beyond certain performance friendly settings and do not actually reach the performance of Megazoom to begin with."

Waveforms per second? Is that what you think by it?

--- End quote ---
Including that. Once you set something similar to 4 Mpts memory of Megazoom IV, or simply set a very fast timebase (hello GW Instek), capture rate will drop a lot compared to the best case specs.
nctnico:

--- Quote from: wraper on February 12, 2022, 01:57:23 pm ---
--- Quote from: 2N3055 on February 12, 2022, 10:56:10 am ---OK, fair enough, please explain what do you mean by : "Performance of Zinq based scopes fall flat beyond certain performance friendly settings and do not actually reach the performance of Megazoom to begin with."

Waveforms per second? Is that what you think by it?

--- End quote ---
Including that. Once you set something similar to 4 Mpts memory of Megazoom IV, or simply set a very fast timebase (hello GW Instek), capture rate will drop a lot compared to the best case specs.

--- End quote ---
That is only logical; the memory needs to be filled which takes sample_interval * memory_depth of time.
wraper:

--- Quote from: nctnico on February 12, 2022, 02:03:19 pm ---
--- Quote from: wraper on February 12, 2022, 01:57:23 pm ---
--- Quote from: 2N3055 on February 12, 2022, 10:56:10 am ---OK, fair enough, please explain what do you mean by : "Performance of Zinq based scopes fall flat beyond certain performance friendly settings and do not actually reach the performance of Megazoom to begin with."

Waveforms per second? Is that what you think by it?

--- End quote ---
Including that. Once you set something similar to 4 Mpts memory of Megazoom IV, or simply set a very fast timebase (hello GW Instek), capture rate will drop a lot compared to the best case specs.

--- End quote ---
That is only logical; the memory needs to be filled which takes sample_interval * memory_depth of time.

--- End quote ---
Obviously, however most of the time is wasted without capturing anything. And Megazoom IV has no such issue.
mawyatt:

--- Quote from: nctnico on February 12, 2022, 12:53:37 pm ---Risk in an ASIC can be mitigated by creating programmable (statemachine) blocks. I think this is already the case for the existing Megazoom ASICs.

In the end the choice for an ASIC depends on cost reduction per product, engineering costs and the ability to add extra features. AFAIK the ADC is also included in the Megazoom ASICs so there is a significant cost saving for having 1 chip where the competition needs to buy 3 seperate chips (ADC, FPGA and memory) and 'glue' these together.

--- End quote ---

The likelihood of Keysight being able to integrate an FPGA and ADC of calibre for a quality DSO today is questionable. Back in 2000 when we integrated the first RF/MW System on Chip which had an FPGA, Memory, 3 Processors and a full RF/MW Transceiver the FPGA was the most difficult IP to acquire. We successfully did such with a startup in Scotland for the FPGA, but soon after Xilinx acquired the startup and suspended any support. They did so because this startup had some innovative IP and was viewed as a potential threat, so Xilinx acquired them before Altera and squashed the IP. Back then it seemed the high end FPGA market was controlled by Altera and Xilinx, and neither was interested in supporting an FPGA in a custom chip, even for some serious $, we tried unsuccessfully to do so!! Don't think this has changed today since the FPGA IP, which includes the SW, is considered some of the most valuable IP in the semiconductor world, and highly protected.

Which begs the question would Keysight have enough clout, $, influence, market, and so on to pull this off and integrate a high end FPGA, with world class ADCs, and memory and still be profitable, don't think so!!

The advanced research level ADCs Keysight was working with a few years ago, like Stringray (see images), had no such FPGA capability on chip.

Best,
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