Author Topic: 8-bit DRAM questions  (Read 904 times)

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Offline RichardcavellTopic starter

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8-bit DRAM questions
« on: March 28, 2023, 11:58:11 am »
Hi. I’m an amateur electronics enthusiast with an interest in retro computing. I found a datasheet for a DRAM chip used in the TRS-80 Color Computer.

https://orchidsound.com/mcm4517p12-dram-16-384-bit-16k-x-1-120ns-pdip-16-motorola/

1. It uses 14 mW when in standby. What exactly puts the chip in “standby”?

2. The chip has “Early write common I/O output capability”. What does this mean?

3. It has 64K compatible, 128-cycle 2 ms refresh. What does 64K compatible refer to?

4. It has “hidden” refresh. Does this mean that the output on Q remains latched/valid even if you modify the address and assert /RAS to do a refresh?

Thanks,

Richard
 

Offline srb1954

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Re: 8-bit DRAM questions
« Reply #1 on: March 29, 2023, 12:59:58 am »
Hi. I’m an amateur electronics enthusiast with an interest in retro computing. I found a datasheet for a DRAM chip used in the TRS-80 Color Computer.

https://orchidsound.com/mcm4517p12-dram-16-384-bit-16k-x-1-120ns-pdip-16-motorola/

1. It uses 14 mW when in standby. What exactly puts the chip in “standby”?
When a memory cycle is complete and both the RAS and CAS strobes return to their inactive levels.
Quote
2. The chip has “Early write common I/O output capability”. What does this mean?
Not particularly clear from the datasheet but the timing diagrams show that input write data is required, and presumably latched, very early in a memory cycle whereas the read output data only appears late on the memory cycle. This would allow the data input D and data output Q to be commoned and connected to a bidirectional data buffer. 
Quote
3. It has 64K compatible, 128-cycle 2 ms refresh. What does 64K compatible refer to?
Compatible with later generation 64K (65636x1) DRAMs
Quote
4. It has “hidden” refresh. Does this mean that the output on Q remains latched/valid even if you modify the address and assert /RAS to do a refresh?
Correct.

You need to obtain the full data sheet and look closely at the timing diagrams included. These show the sequence of each type of memory cycle and when data and addresses to the DRAM have to be applied relative to the RAS and CAS strobes.
 

Offline m k

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Re: 8-bit DRAM questions
« Reply #2 on: March 29, 2023, 10:54:01 am »
And after that you'll understand why memory controllers became quite respected new product range.
Advance-Aneng-Appa-AVO-Beckman-Danbridge-Data Tech-Fluke-General Radio-H. W. Sullivan-Heathkit-HP-Kaise-Kyoritsu-Leeds & Northrup-Mastech-OR-X-REO-Simpson-Sinclair-Tektronix-Tokyo Rikosha-Topward-Triplett-Tritron-YFE
(plus lesser brands from the work shop of the world)
 

Offline srb1954

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Re: 8-bit DRAM questions
« Reply #3 on: March 29, 2023, 11:24:59 am »
Especially when you consider how much simpler and easier these older DRAM devices were compared to the extreme complexity of modern DRAM chips.
 


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