Author Topic: 80 Trainer project...  (Read 1612 times)

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Offline alank2Topic starter

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80 Trainer project...
« on: June 25, 2020, 02:53:34 pm »
I posted this over at the vcfed forum as well.  Looking to get feedback/ideas/comment on my project.

Here is the project I've been working on lately, a lot is done, but there is a lot to still do.

The general goal of this project is to be a microprocessor trainer for the Intel 8080. It will also support the 8085, and I'd really like to add the 4004/4040/8008 maybe if that ever happens. Like other trainers, it will allow you to enter opcodes, step through code, check registers, set breakpoints, etc. It does not seek to emulate any particular trainer like the SDK-80 or SDK-85. There are lots of differences between its approach and how those were designed including that the control panel and interface are outside of the emulated CPU.

I've been working on the first PCB for it (I'll attach a picture). I haven't ordered the PCB's yet, so if you see something I can improve on, please let me know. Probably going to order pcb's in a week or so - it will b nice to be working on actual hardware and off of the breadboards I've been working on with wires all over the place. I'll start by describing the PCB - for connections it has two RS232 serial ports (9 pin), an IO port (16 I/O pins), an expansion i2c header, and a DC barrel jack for 5VDC. Also on board there is a slide power switch, 24 Cherry MX keyswitches, 3 dual 7 segment displays, Piezo, two EEPROM sockets, and an RTC/backup battery. I've tried to style the PCB like an old trainer board would be by using mitered circular traces to try to make them look a bit more hand drawn, some areas of it look better than others. I didn't want a total departure from 90/45 degree traces. The whole thing will be run by an ATMEGA1284P which has 16K SRAM and 128K flash. I'm using every pin on it so there are no spares. It is really meant for a 5V DC power in connection, but it will work down to 2.5V with a very dim display. I'll probably leave the brown out voltage at 1.8V to allow this in case someone wants to run it on 3 alkaline cells. It has a ground plane on the bottom, but I don't have one one top except for the RTC crystal area. I'll probably make a lower cost tactile switch version as well (switches+keycaps cost $36!). I opted not to use diodes in the keypad, but to deal with ghosting/masking I only allow two keys to be pressed at any given time anyway. I've worked carefully on the code that processes keys so it should allow for quick entry with good debouncing. There is no hardware handshaking on the serial ports (I ran out of pins with only a 40 pin AVR), but it will support software handshaking outside of the emulation level. The i2c expansion header could open up a whole world of more connectivity or devices. You can add 7 more IO expanders (16 pins each), 2 more EEPROM "drives", etc.

The 16K SRAM limit means it will not be running CP/M. I'm hoping to make 15K of that available for emulation leaving 1K for the AVR to use. For the 8080/8085 this will be mapped to 0x0000-0x3bff. I probably won't use all of the 128K flash for code, so some of it perhaps 32K can be set aside for being mapped as ROM into another area such as 0x8000-0xffff. It will have a bootloader that can update the firmware or the mapped ROM area via XMODEM CRC. The RTC has 64 bytes of battery backed up SRAM that I will probably make available as a virtual i2c device. There will be a in/out style function call that initiates an i2c transaction with any of the i2c hardware that could then be used to read or write bytes to the RTC, IO expander, EEPROMs, etc.

The keys picture below gives a hint of how the UI/control panel might work, but the user will be able to load or save chunks of memory to/from EEPROM. I originally was going to just try to carve up a 128K EEPROM into 15K slots, but giving only 8 "files" essentially would be a bit limiting as the user will likely be saving smaller chunks of memory, so I wrote an 8 bit FAT filesystem for it. Essentially it has a 1 byte filename which can be 00-FF so now you can save and load many different chunks of data by "name". There will be an in/out interface for the file system as well so the user can access an i2c EEPROM as a block device or a filesystem device.

The AVR will run at 18.432MHz, and my 8080 C emulation code clocks in somewhere around 2MHz-2.4MHz emulated speed depending on whether I dedicate some registers to it or not.

I really wanted it to be able to be fully used without any other hardware which is why it has the built in keypad and displays. Those could be cumbersome to work on, so the user could use the second serial port instead. Keys will be mapped to the internal keypad so the external control panel and internal one will operate in sync with each other. It would also be able to load/save via Intel Hex or XMODEM CRC. One difference is that the external one can output more data such as all the registers while stepping, etc. The user code can also override the control panel display to display what it wants to or use the control panel keypad for entry (while running).

I've already run Altair 4K and 8K basic and now that someone sent me the these I may be able to add a load/save command for the FAT8 EEPROM's which would be cool. I'd also like to have some other tools/utilities for it such as emulated CPU exercisers, etc. I'm going to try to expose as many of the AVR's resources as I can such as a 16 bit timer, piezo control, etc.

Like all projects it is huge and unwieldy, but I'm going to start with the minimum and then try to add more stuff to it as I have time! If you guys have any ideas on how to do something better or perhaps more in line with how trainers actually worked, let me know. I see this project as sort of an educational style thing that someone can use to get close to how the hardware was and learn how to make it do things. It is sort of a hybrid crazy idea, but for years I've been trying to do a project around emulation so this is what has materialized!

PCB is 7" x 7".
 

Offline alank2Topic starter

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Re: 80 Trainer project...
« Reply #1 on: June 26, 2020, 01:51:43 pm »
If anyone has time to look over my pcb and let me know if you see any flaws - I'm going to order it tomorrow.
« Last Edit: June 26, 2020, 01:53:33 pm by alank2 »
 

Offline PKTKS

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Re: 80 Trainer project...
« Reply #2 on: June 26, 2020, 02:16:58 pm »

The 16K SRAM limit means it will not be running CP/M. I'm hoping to make 15K of that available for emulation leaving 1K for the AVR to use. For the 8080/8085 this will be mapped to 0x0000-0x3bff.

Actually on the early 80s 16k CP/M was the bare minimum setup
for a very trimmed  BIOS image with BDOS overloading
everything on the fly

Later if my recollections are good enough it was the
BANK SWITCHING memory paging introduced on almost
all hardware that required a 64K typical minimum CP/M image

Eventually BANK SWITCHING became EMS when
CP/M was ported for the 8086 (or cloned as XX-DOS)
(eg. and Lotus  introduced EMS 3.0)

16K was enough to run all sort of micro-controllers
based on CP/M on early 80s - but not capable of
running  a ever growing OS like CP/M-86 around the
late 80s.

"IF" I  remember right I have dealt with a  bunch of
exclusive 16K CP/M images for 8085 and Z80 modules
very early 80s - they never passed much of that 16K

Later the Z80 hardware replaced with 8086 allowed
for much larger space requiring 64K typical images
using bank-switching hardware

Paul
« Last Edit: June 26, 2020, 02:23:45 pm by PKTKS »
 


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