Board from 60's early military computer: UNIVAC CP-901

[D Straney]

Was buying some interesting-looking cheap salvaged avionics to open up a bit ago, when I noticed that the seller also had these intriguing boards for $10, so couldn't resist tossing one in the cart: https://www.ebay.com/itm/144368442255

The eBay listing indicated "Hughes" for some reason, but the Univac logo on the back side showed it was from an old computer, old enough to use individual SSI logic gates.  Searching the RM1001X part number on the ICs led me to a very helpful document, which explained the technical and historical background, and that one of the computers with these ICs, the CP-901, was used in the P-3C military aircraft, which matches the source given in the eBay listing and explains the connection and application.

Fascinating stuff - apparently the RM1001X ICs on this board are quad 2-input NAND gates.  As typical for plenty of early-IC-based computer designs, the logic was implemented completely with NAND gates, with 2 types of ICs: this quad 2-input NAND, and a dual 4-input NAND.  This was long before CMOS processes were established and even before TTL, so it used DTL with gold-doped bipolar transistors to reduce the storage time (and therefore turn-off delays), before Baker clamps became a better way to go about this.  Date codes on the ICs show they were made in 1970, which was roughly 3 years into the CP-901's lifecycle.

Anyways, thought other people might be interested in seeing and hearing about these.

[Alex Eisenhut]

Was buying some interesting-looking cheap salvaged avionics to open up a bit ago, when I noticed that the seller also had these intriguing boards for $10, so couldn't resist tossing one in the cart: https://www.ebay.com/itm/144368442255

"NO INTERNATIONAL SHIPPING" before anyone gets too excited.

[cfbsoftware]

"NO INTERNATIONAL SHIPPING" before anyone gets too excited.

I just checked and International Shipping is now included (except for 11 countries).

[xrunner]

Fascinating stuff - apparently the RM1001X ICs on this board are quad 2-input NAND gates.  As typical for plenty of early-IC-based computer designs, the logic was implemented completely with NAND gates, with 2 types of ICs: this quad 2-input NAND, and a dual 4-input NAND.  This was long before CMOS processes were established and even before TTL, so it used DTL with gold-doped bipolar transistors to reduce the storage time (and therefore turn-off delays), before Baker clamps became a better way to go about this.  Date codes on the ICs show they were made in 1970, which was roughly 3 years into the CP-901's lifecycle.

Can you try to activate one of the devices and see if the logic function works? 

[Alex Eisenhut]

"NO INTERNATIONAL SHIPPING" before anyone gets too excited.

I just checked and International Shipping is now included (except for 11 countries).

IDK I still see "NO INTERNATIONAL SHIPPING"?

[SeanB]

International to me, though it is expensive.....

[D Straney]

Can you try to activate one of the devices and see if the logic function works? 

Good question, that would be fun to try.  Not sure of the pinouts: from looking at the buses on the board I can tell that pin 7 is Vcc and pin 14 is gnd, but will have to look at the connections between the different logic chips onboard to figure out which pins are inputs vs. outputs.

[schmitt trigger]

Hmmmm….. mmmmm,
I don’t see any decoupling caps.

[bdunham7]

Date codes on the ICs show they were made in 1970, which was roughly 3 years into the CP-901's lifecycle.

It's interesting that they wouldn't update the design as they went, since flat-pack DTL was a 1960-ish thing (not doubting your date codes) while TTL was mid-60's and AFAIK CMOS was well under way by 1970.  I'm guessing that board was a lot more expensive than it needed to be.

[D Straney]

Yeah I'm sure it was plenty expensive.  Didn't realize commercial CMOS logic was an established thing by 1970 - interesting.  There's probably something to be said just for the time spent qualifying the parts and the entire assembly with vibration/temperature cycling/etc., that they didn't want to go changing anything.

As for decoupling caps, I'm pretty sure that's the lone passive in the corner.  Looked like a resistor at first but doing a resistance measurement shows the "slow ramp" expected from a capacitance.  Always struck by how old digital logic boards (like the Saturn V LVDC, too) went so light on the power filtering: with the glacial transition times of this kind of logic though you can get away with a whole lot more, vs. newer HC/AC CMOS where you've got much higher speeds and shoot-through, so you really need those close-in decoupling caps to support the short current spikes.  Even 4000-series CMOS has pretty slow transition times often 100ns+.

Didn't look at the pinout more yet, but did power it up with 5V and it drew a steady 54 mA, which seems in the sort of ballpark I'd expect.

[radiogeek381]

The choice of DTL in the late '60s (if it was produced mid-70 then the design likely was "in the box" by 1969 - perhaps much much earlier) could have been influenced by the availability or qualification of mil-spec qualified parts in the 5400 series (TTL) or COS/MOS. Often a system manufacturer would have a "qualified parts list" that meant they had incoming test systems in place, the chip supplier had their own tests, the parts had been characterized across voltage and temperature, the datasheets were "accurate," there had been lifetime tests, and the supplier could commit to timely delivery of parts in production quantities as long as the computer was in the catalog. 

All that takes time.  So a technology that showed up in 1969 from a chip vendor would not likely have been qualified before '70 or even later. (Perhaps there are counter-examples? Those would be interesting.)

I'm noting the Fairchild 900 series was nominally 5V and unipolar. (No negative supply.). The open collector outputs would likely have been compatible with early TTL, and maybe even older RTL and diode logic modules. 

As crude as these devices seem, they may have been faster than early-70s CMOS.  A 2 input CMOS NAND in '75 had a max prop delay of 100 ns (better than I remembered) with a very limited fan-out. The input loading of a CMOS gate was about 2x the comparable DTL 2 input NAND. And the advantage for DTL was about 2x per pF of load.

There were likely a lot of reasons to choose DTL at the time, other than inertia. But inertia probably played a part.

[Alex Eisenhut]

International to me, though it is expensive.....

I mean what I see in the item description once you scroll down. Still no reply from the seller.