16x TSM4256 replaced by 1x IS41C16256C or IS41C16257C

[SoundLockEng]

Hi all,
Im looking for some advice as I am a bit out of my comfort zone in vintage computer design... or just computer design...

So I am looking at replacing a PCB i have that addresses a 16bit bus into 16x TSM4256 chips simultaneously with either 8 or 9 bit addresses.
I was wondering if it would be able to replace the 16 4256 chips with a single IS41C16256C or IS41C16257C

I think it should work, however I am not sure about the refresh cycle and nuances that i have missed.

I have attached a PDF of the original DMX96.2 card that I have reverse engineered and my take on the version with the ISS chip (DMX96SL) I believe addressing LCAS and UCAS at the same time with the same CAS signal is the correct thing to do...

Any advice is much appreciated!

All the best
Chris

[cruff]

It looks like that should work, as long as the timing requirements are being met. If the original board didn't distinguish upper/lower bytes, then connecting both CAS pins to the same signal is correct.

[SoundLockEng]

Hi cruff, Thanks for your reply, Im glad that im aiming in the right direction! I have laid out a board so will give it a try!
fingers crossed!

[SoundLockEng]

I thought I would take this a step further.

The IS41C16256C has OE which the original TSM4256 chips didn't. Because of this they included E17 and E18 which are SN74LS245N giving the card tri-state connection to the data bus.
I guess using a combination of the signal used for the cards OE, the direction signal and spare logic gates I could derive a signal for the IS41C16256C's OE pin and remove E17 and E18.

I would think that also E19 (SN74LS244N) could also be removed as in the original design it is uses as a buffer for the 16 ram chips hanging off the address bus but now there is just the one, which will appear no differently than the IS41C16256C on its own...

[SoundLockEng]

Here is my updated idea removing the extraneous IC's and using leftover logic gate to drive the OE for the ISS chip from the incoming card enable and card data direction.

[cruff]

The same optimizations had also occurred to me, so what you are proposing may be workable. As you say, the refresh cycles should be looked at to see if it will behave properly.

[SoundLockEng]

So I just thought that I would update the thread to say that the boards work really well!!
I made the version with the least number of components using the OE facility on the RAM chip rather than the tri-state chips that were a remenance of the original design.

Thanks all!