:: zener Vref spinoff ?

[3roomlab]

after getting drawn into knowing more about vref, i was drawn to watch this multi-part video by peter oakes ( i cant remember who posted it, BUT a big thanks to you!)
https://www.youtube.com/playlist?list=PL_atu5RtEPi4aNzoMtZ5_S6ruhFR98T_p 

in the 2nd video, he introduces a very jellybean approach to getting a vref = zener + N-JFet
i started to try some simulations and came up with this. but i tried it in 2 stages, so the 2nd stage Jfet tries to further stabilize the stabilized output of stage 1. the 2nd pic shows the target zener D1 after being "shielded" from a higher input voltage and increase of 9uV.

is my understanding of oakes' constant current jfet application correct by this 2 stage simulation?

in his video he speaks of the JFET 2n5xxx or J109. in simulation, it is hard to tell, i assume the constant current setting is related to the gate threshold but it doesnt really run that way in virtual so this portion i am confused. ( in E14 listing i found the J110 has -500mV, J109 has -2v Vgs(off). in essence does it mean a 1mA current will require using 0.5k/2k respectively?)

if other noise factors are not an interference/problem (or could be negated), would it in theory mean that with a correct combination of stages ... it is very likely 1 could approach very nearly remarkable stability level?
i am guessing the jfet are terrible at tempco stability ... 

[T3sl4co1l]

Yes, this works fine for increasing PSRR, at least at modest frequencies (eventually, Cdss will take its cut, but for what little capacitance JFETs have, this will be at a pretty high frequency that can be easily filtered).

Against temperature, you're probably better off using resistor+zener cascades.

You can try a temperature sweep (or parameter sweep with temperature as the variable), but I don't remember if SPICE models JFETs over temperature as well.

JFET pinchoff voltage is extremely variable; the model probably uses a typical-case value.  Refer to the datasheet for the expected ranges.

Tim

[3roomlab]

i simulated a 100Hz 1v p-p "noise" injection at Q2 pin1, and snubbers (220uF + 0R33) at pin3 of each Jfet.
cathode of D1 sees a 500nV p-p. virtual DMM indicates something like -122dB noise, kind of hard to believe it gets that low, maybe it is not accurate 
this jellybean setup look like very easy to "tweak" 

if the whole setup sits in a thermally insulated +60^oC encasement, it could make an interesting experiment that has absolutely nothing to do with any big named famous Vref parts or any IC. if the thermal control could be well defined ... i wonder how good would such a setup get to ... 100ppm voltage/tempco?

im sure somebody has build a vref in this way . on the flip side, i also see that a 6.x volt zener + 3.x volt zener could used  to provide slightly -ve tempco and negate some of the resistor +ve tempco (in theory)

[JohnnyBerg]

if the whole setup sits in a thermally insulated +60^oC encasement, it could make an interesting experiment that has absolutely nothing to do with any big named famous Vref parts or any IC. if the thermal control could be well defined ... i wonder how good would such a setup get to ... 100ppm voltage/tempco?

I am in this voltage reference thing now for quite a while. I find it hard to understand what you are doing here. Some current sources with some zeners? And put that in a oven for a 100pmm/°C? What is your objective?

Why going in all that trouble, if a 9 cent LM385 provides better specs, without a oven?

[3roomlab]

put that LM385 to substitute the D1 !?

[JohnnyBerg]

put that LM385 to substitute the D1 !?

No need for a current source. Just a battery, resistor and a LM385.

[3roomlab]

i guess so, 100ppm-ish not going to be worth too much hassle since existing IC are available. but have you tried? i am very sure following the usual datasheets will be a surefire way, but i think 30years ago, this could be how them engineers discovered how to make a Vref of some sort 

assuming the PSRR is true @220uF, when subbed with 1000uF, the PSRR become approx 145dB at this rate, maybe PCB creepage will insert its evil hand? how much disturbance is PCB creepages at? below -130dB? nV? unfortunately, i do not have ways to test to this low a level 

but even for LM385, the noise it has seems rather high. 100Hz = over 1500nV/(hz)^1/2 am i right this equates to 150nV?

[JohnnyBerg]

but have you tried?

assuming the PSRR is true @220uF, when subbed with 1000uF, the PSRR become approx 145dB at this rate, maybe PCB creepage will insert its evil hand? how much disturbance is PCB creepages at? below -130dB? nV? unfortunately, i do not have ways to test to this low a level 

Complete knockout, no idea what you are talking about. 

but even for LM385, the noise it has seems rather high. 100Hz = over 1500nV/(hz)^1/2 am i right this equates to 150nV?

No idea how you get to this. The datasheet of the LM385 (TI) gives a bit of a strange noise spec. It gives a wideband noise of 150µV rms typical. For references the 0.1Hz/10Hz 1/f noise is mostly specified.

Anyhow, if I measure the noise (over 0.1 .. 10hz) I get 9,8 µV pp, and that is awesome for a 9 cent reference.
note: vertical scale = 2 µV/div horizontal scale is 0.5 sec/div



If I change the bandwidth of the preamp to 0.1 .. 100 hz the noise is 16.8 µV pp, still awesome and easy filtered down to the 0.1 .. 10hz spec.

note: vertical scale = 3 µV/div horizontal scale is 0.2 sec/div

[dannyf]

Not sure what advantage there is in using a double current source. I would have simply powerered it via a voltage regulator or a r/c filter.

Ovenized it will help reduce drift: the simplest would be a ptc-type heater, or a to220 transistor as a heater + temp sensor. Good for up to a few watts - more than sufficient here.

Your aging performance may not be good, with the ovenization. However, your noise should be lower than the ref ics'.

[T3sl4co1l]

if the whole setup sits in a thermally insulated +60^oC encasement, it could make an interesting experiment that has absolutely nothing to do with any big named famous Vref parts or any IC. if the thermal control could be well defined ... i wonder how good would such a setup get to ... 100ppm voltage/tempco?

So you just keep putting more polish and gilding on it?

But the fact remains: a turd is a turd.

If you started with a good reference in the center, you'd have that many times better performance with respect to ambient temperature and aging.  And first-time accuracy without needing calibration.

And, once you factor in all this junk, you're paying way more for the double enclosure and the heater and the support components and on and on and on, versus just getting a $3 bandgap device.  You can't win!

Even just trying to fight a TL431 with a 1N5231B or whatever is a dubious battle, especially for the extra functionality you get with the former.

Tim

[3roomlab]

experiment n curiosity 

@ dannyf, would the 2 stage improved supply noise rejection aid in Vref stability? ie: stabilizing a rough supply to stabilize the actual stabilized unit
 it is just looking at an angle of constructing a supply that doesnt use the usual IC/opamp.

the -145db is what the simulation DMM says ref to virtual ground, its AC voltage value. i assume in real situation it wont be this good.

@johnnyberg thanks for showing the measurements. for 9cents, of course it is making any zener obselete. but LM385 is about USD0.75 here lol  . but not that it is unaffordable, but it is the what if we use only jfet, resistors and zeners only situation.

[JohnnyBerg]

@johnnyberg thanks for showing the measurements. for 9cents, of course it is making any zener obselete. but LM385 is about USD0.75 here lol  . but not that it is unaffordable, but it is the what if we use only jfet, resistors and zeners only situation.

For 9 cents you could take a gamble on ebay or aliexpress   
Get 10 or so ..

But the fact remains: a turd is a turd.

+1

You cannot beat a LM385 with the stuff you are using now. Other stuff, equipment and skills are needed!

[3roomlab]

i would be more tempted to get a USD2 zener just to see the workings of the Jfet stabilizing it, and if i have a oven, i would "rollercoaster" it inside. maybe use peter oakes version of a hot air gun  . but then again, after that, the "something even better" effect will set in 

[dannyf]

would the 2 stage improved supply noise rejection aid in Vref stability?

I am sure it doesn't hurt, aside from the additional noise introduced by the additional parts involved.

the CCS has very high rejection ratio for the power supply ripples so anything above that is going to be of limited / marginal value.

Once ovenized, I don't think you will see meaningful improvement from a CCS-driven zener vs. a voltage regulator / rc network driven zener. The CCS-driven zener may have some advantage on noise vs. the ccs-driven zener, however.