I see what you mean but I'm not sure I approve such waste of resources.
It depends on what are resources for you. If you save money by ordering a cheaper PCB, or if you save time by simplifying your routing job, this seems like resources are being saved, not wasted.
Pins? I don't think you really save them. When you buy a Xilinx part in a smaller package, it has all the same pins as the same part in a bigger package (e.g. XC7A15T-2FGG484C is exactly the same as XC7A15T-2FTG256C), only some of the pins are not bonded out.
Not only 484 packages are significantly more expensive
$20-30 isn't a big deal compared to $200 saved on PCB fabrication. Of course, if you go to production, the economy changes. But this is no brainer for prototyping.
, but there are also cases where you need to route out specific pin groups (for example if you want to have DDR2/3 memory device, you are quite limited in selection of pins).
DDR pins are abundant in 7-series. There are some pins that are in the middle, such as JTAG or config pins. But these are always the same regarding of the package, and always in the middle.
May be if Xilinx thought about people who's going to fan out their FPGAs, it would be easier with smaller parts. But it certainly looks like they locate their pins specifically to make fanouts as difficult as they can - all the big customers will have gazillion-layer boards anyway.