I don't quite understand how this will operate. Suppose a pot gives a voltage of say 3.14V, then the n-bit integer representation of 3.14V is obtained with the n-bit ADC and immediately put in the m-bit DAC as 3.14V? Then if the 'store' button is pressed, the DAC value is saved in memory. Now the pot voltage changes to 2.72V and the DAC outputs 2.72V, but shortly after, the 'recall' button is pressed, and the m-bit DAC output is now 3.14V? If that is the case wouldn't be better to use quadrature encoders instead of pots to adjust the DAC outputs directly?
Normally, the voltage comes from the pot, when the recall button gets pressed, the voltage comes from the DAC. Quadrature encoders? I don't think so - the resolution has to be fine enough that you don't hear 'jumps' in the pitch and also coarse enough that scrolling them doesn't take too long - normal pots work well for this. Plus I can get pots cheap, the right size and I don't like the feel of encoders.
You surely are aware that for a PWM to DC conversion there will be ripple.
Yeah, I was thinking that I could extensively filter that out enough for it to be useful. I think the DAC is a better bet
Tektronix did that for their early microprocessor controlled oscilloscopes. The potentiometer values were immediately digitized and then regenerated with a DAC with the microprocessor in the middle. ADCs and DACs were expensive back then so both were multiplexed. For the DAC, a multiplexer was used to connect it iteratively to a series of hold capacitors followed by JFET operational amplifiers configured as voltage followers.
So a DAC, 4051 multiplexer, and two TL074 quad operational amplifiers yield 8 output channels. But today quad DACs are available at reasonable prices.
Keep in mind that potentiometer "settablity" is only just better than 8 bits and 10 bits is more than enough. But this is a good match for common 12 bit converters because they are usually only linear to 10 bits anyway. If you are hoping to get 12 bits, 1 part in 4096, out of single turn potentiometers, then you will be disappointed; they are just not that good.
That is what I considered first of all, what kind of hold capacitors were used? I know of an arrangement like this (https://www.electronicshub.org/sample-and-hold-circuit/) but it doesn't seem like it would hold a voltage for a long time
That's interesting that it's only about 8 bits in resolution. However, the purpose the of digitising and recalling the state is to match the voltage on the pot as closely as possible. Maybe a less accurate ADC would be ok, I'm not sure yet - I have to hear it in action to say whether I'm happy with it
You should be able to estimate the current out of the capacitor in very rough terms by looking at the chosen opamp's input bias current, capacitor leakage, and any leakage path back through the switch/mux. Once you have that, you can estimate the voltage change per time for a given value/type of capacitor, and use that to select an appropriate value / timing. Since I assume you'd still have a DAC sourcing the voltage into the S&H, you shouldn't need to hold the value for very long (10s of ms at most?) before you can refresh it. Low leakage type capacitors would normally be used here, probably a film or NP0 type in your case.
Edit: Example...not careful engineering here but to put some numbers on it...
TL074 has input bias current max of 7nA over the full temperature range.
A poly film cap should have leakage under 10nA
4051 off-state leakage current max is 100nA (!!)
So we expect leakage current < 117nA.
Capacitor voltage change with a constant current discharge is given by $$\frac{1}{C}It$$ where C is capacitance, I is the discharge current, t is time in seconds.
So say you have a 470nF film capacitor, after 10ms your voltage will have changed about 2.5mV worst case.