Author Topic: 12 Channel DAC sample and hold design  (Read 2780 times)

0 Members and 1 Guest are viewing this topic.

Offline vixoTopic starter

  • Regular Contributor
  • *
  • Posts: 70
12 Channel DAC sample and hold design
« on: February 20, 2020, 10:13:28 am »
I like to design musical equipment and often in these designs parameters are voltage controlled. I'm trying to design a circuit which will store the voltages from 12 pots and store them digitally for recall. Digitising seems fairly straightforward, but when the voltages are recalled they need to "hold" at the DAC outputs. What is the preferred way of doing this - are there DACs which incorporate sample and hold circuits, or should I use a single channel DAC and switch it into a twelve channel sample and hold (does such a thing exist)?

Ive been looking at the MAX11311 for the DAC - it has 12 channels, 12 bits and is fast enough for my needs, however it seems complicated and I'm not sure whether the analogue conversion will hold at each channel output

can anyone give me some tips / pointers?

 
 
 

Offline ve7xen

  • Super Contributor
  • ***
  • Posts: 1193
  • Country: ca
    • VE7XEN Blog
Re: 12 Channel DAC sample and hold design
« Reply #1 on: February 20, 2020, 11:01:03 am »
Unless you're really trying hard to cost-optimize, and with trivial accuracy/stability/linearity etc. requirements, I would probably just throw DACs at this problem. Something like the MCP4728 is 4x12 bit DACs for $2 at qty 1. Put three of those on your board on the same I2C bus and it'll be pretty easy to control too. DACs for control purposes like this almost never require a continuous clock and data, just send them values when you feel like it and they will hold them.

Maybe doing 12 channels of S&H (a capacitor, analog switch, and opamp) would be a bit cheaper, but it'd also require a lot more 'active engineering' and tuning to get right.
73 de VE7XEN
He/Him
 

Offline vixoTopic starter

  • Regular Contributor
  • *
  • Posts: 70
Re: 12 Channel DAC sample and hold design
« Reply #2 on: February 20, 2020, 11:09:56 am »
Greeat, thanks! i was just looking at that solution. Just to make sure - i don't need a chip select pin on those DACs and can just control all on the same i2c bus? 
 

Offline splin

  • Frequent Contributor
  • **
  • Posts: 999
  • Country: gb
Re: 12 Channel DAC sample and hold design
« Reply #3 on: February 20, 2020, 02:49:32 pm »
Something like the MCP4728 is 4x12 bit DACs for $2 at qty 1.

If they fit your needs great, but be aware they're pretty meh. Dave Jones fell foul of that in his PSU (#240), in particular the untrimmed gain error of up to 1.5% and up to 20mV offset. Max INL (integral linearity) is +/- 13 LSBs which means it only has the accuracy of an 8 bit DAC. The internal reference has a temp coefficient of 45ppm/C which may be good enough but it is very noisy - 0.1 to 10Hz noise is dreadful at 290uVpp! The DAC's noise is not specified.

If you need better, TI do a few; the DAC60501/2/4/8  (1 to 8 DACs) in particular look very good for the price. INL max is 1 LSB, LF noise is only 14uVpp and the reference TC is 10ppm max (it was 5ppm in earlier revisions of the datasheet). Untrimmed gain and offset errors are also much better.

AD/Linear Technology have a large selection of DACs with up to 8 channels but they are rather expensive.
 
The following users thanked this post: jesuscf

Online Jeroen3

  • Super Contributor
  • ***
  • Posts: 4078
  • Country: nl
  • Embedded Engineer
    • jeroen3.nl
Re: 12 Channel DAC sample and hold design
« Reply #4 on: February 20, 2020, 03:20:27 pm »
Why use DAC's when you can use 12 PWM outputs? Or is that not audiophoolery enough?
If they emulate potentiometers they don't need fast changes, so slow filters is not a problem right?
12 ADC channels and 12 PWM channels can probably be found in one cheap STM32 part.
 

Offline vixoTopic starter

  • Regular Contributor
  • *
  • Posts: 70
Re: 12 Channel DAC sample and hold design
« Reply #5 on: February 20, 2020, 04:13:52 pm »
Something like the MCP4728 is 4x12 bit DACs for $2 at qty 1.

If they fit your needs great, but be aware they're pretty meh. Dave Jones fell foul of that in his PSU (#240), in particular the untrimmed gain error of up to 1.5% and up to 20mV offset. Max INL (integral linearity) is +/- 13 LSBs which means it only has the accuracy of an 8 bit DAC. The internal reference has a temp coefficient of 45ppm/C which may be good enough but it is very noisy - 0.1 to 10Hz noise is dreadful at 290uVpp! The DAC's noise is not specified.

ah that's most probably a deal breaker for me, thanks for pointing it out. I've never used a DAC before, how realistic is mV accuracy?

Why use DAC's when you can use 12 PWM outputs? Or is that not audiophoolery enough?
If they emulate potentiometers they don't need fast changes, so slow filters is not a problem right?
12 ADC channels and 12 PWM channels can probably be found in one cheap STM32 part.

possibly, I want to generate accurate DC voltages. The voltages are CV voltages for pitch, to which the ear is very sensitive and I'm working in microtones rather than ordinary 12 note tuning - im not exactly sure how accurate I need them to be - but my first guess would be mV accurate (if this is possible/realistic). How accurate can I get a PWM at DC?
 

Offline schmitt trigger

  • Super Contributor
  • ***
  • Posts: 2223
  • Country: mx
Re: 12 Channel DAC sample and hold design
« Reply #6 on: February 20, 2020, 04:27:53 pm »
You surely are aware that for a PWM to DC conversion there will be ripple.

Of course you can reduce the ripple by using the highest possible frequency and then a higher order low pass filter with a crossover frequency at least a couple of orders of magnitude lower....you would have to calculate/simulate how much ripple would be left, and the effect it would have in your 12 bit-equivalent requirement.

Perhaps it is a non issue, but something that requires inspection.

A continuous-time higher order filter would require a lot of components, though.
 

Offline jesuscf

  • Frequent Contributor
  • **
  • Posts: 499
  • Country: ca
Re: 12 Channel DAC sample and hold design
« Reply #7 on: February 20, 2020, 05:04:17 pm »
I'm trying to design a circuit which will store the voltages from 12 pots and store them digitally for recall. Digitising seems fairly straightforward, but when the voltages are recalled they need to "hold" at the DAC outputs.

I don't quite understand how this will operate.  Suppose a pot gives a voltage of say 3.14V, then the n-bit integer representation of 3.14V is obtained with the n-bit ADC and immediately put in the m-bit DAC as 3.14V?  Then if the 'store' button is pressed, the DAC value is saved in memory.  Now the pot voltage changes to 2.72V and the DAC outputs 2.72V, but shortly after, the 'recall' button is pressed, and the m-bit DAC output is now 3.14V?  If that is the case wouldn't be better to use quadrature encoders instead of pots to adjust the DAC outputs directly?
Homer: Kids, there's three ways to do things; the right way, the wrong way and the Max Power way!
Bart: Isn't that the wrong way?
Homer: Yeah, but faster!
 

Offline ve7xen

  • Super Contributor
  • ***
  • Posts: 1193
  • Country: ca
    • VE7XEN Blog
Re: 12 Channel DAC sample and hold design
« Reply #8 on: February 20, 2020, 08:52:18 pm »
Greeat, thanks! i was just looking at that solution. Just to make sure - i don't need a chip select pin on those DACs and can just control all on the same i2c bus?

If you read the datasheet you'll see that you can program the address in EEPROM by I2C and using the ~LDAC pin provided for this purpose. Otherwise they will all respond at address 000. So you can either program them out of circuit with some kind of test jig, and not connect the ~LDAC pin, or you can connect the ~LDAC pin to your controller and program them that way, and then address them on the same bus by the addresses you programmed.

Quote
If they fit your needs great, but be aware they're pretty meh. Dave Jones fell foul of that in his PSU (#240), in particular the untrimmed gain error of up to 1.5% and up to 20mV offset. Max INL (integral linearity) is +/- 13 LSBs which means it only has the accuracy of an 8 bit DAC. The internal reference has a temp coefficient of 45ppm/C which may be good enough but it is very noisy - 0.1 to 10Hz noise is dreadful at 290uVpp! The DAC's noise is not specified.

Good point, I wasn't making a suggestion on that part, just that they're available and cheap! Good to know that it's a pretty horrible device, but I guess you can't complain at the price.
73 de VE7XEN
He/Him
 

Offline David Hess

  • Super Contributor
  • ***
  • Posts: 16621
  • Country: us
  • DavidH
Re: 12 Channel DAC sample and hold design
« Reply #9 on: February 21, 2020, 01:15:17 am »
Tektronix did that for their early microprocessor controlled oscilloscopes.  The potentiometer values were immediately digitized and then regenerated with a DAC with the microprocessor in the middle.  ADCs and DACs were expensive back then so both were multiplexed.  For the DAC, a multiplexer was used to connect it iteratively to a series of hold capacitors followed by JFET operational amplifiers configured as voltage followers.

So a DAC, 4051 multiplexer, and two TL074 quad operational amplifiers yield 8 output channels.  But today quad DACs are available at reasonable prices.

Keep in mind that potentiometer "settablity" is only just better than 8 bits and 10 bits is more than enough.  But this is a good match for common 12 bit converters because they are usually only linear to 10 bits anyway.  If you are hoping to get 12 bits, 1 part in 4096, out of single turn potentiometers, then you will be disappointed; they are just not that good.
 
The following users thanked this post: WattsThat

Offline jesuscf

  • Frequent Contributor
  • **
  • Posts: 499
  • Country: ca
Re: 12 Channel DAC sample and hold design
« Reply #10 on: February 21, 2020, 04:32:29 am »
Tektronix did that for their early microprocessor controlled oscilloscopes.  The potentiometer values were immediately digitized and then regenerated with a DAC with the microprocessor in the middle.

More recent Tektronix oscilloscopes use encoders, which to me makes a lot more sense:

https://www.eevblog.com/forum/repair/tek-tds3000b-front-panel-encoders-are-these-custom-made/
Homer: Kids, there's three ways to do things; the right way, the wrong way and the Max Power way!
Bart: Isn't that the wrong way?
Homer: Yeah, but faster!
 

Offline vixoTopic starter

  • Regular Contributor
  • *
  • Posts: 70
Re: 12 Channel DAC sample and hold design
« Reply #11 on: February 21, 2020, 08:58:33 am »
I don't quite understand how this will operate.  Suppose a pot gives a voltage of say 3.14V, then the n-bit integer representation of 3.14V is obtained with the n-bit ADC and immediately put in the m-bit DAC as 3.14V?  Then if the 'store' button is pressed, the DAC value is saved in memory.  Now the pot voltage changes to 2.72V and the DAC outputs 2.72V, but shortly after, the 'recall' button is pressed, and the m-bit DAC output is now 3.14V?  If that is the case wouldn't be better to use quadrature encoders instead of pots to adjust the DAC outputs directly?
Normally, the voltage comes from the pot, when the recall button gets pressed, the voltage comes from the DAC. Quadrature encoders? I don't think so - the resolution has to be fine enough that you don't hear 'jumps' in the pitch and also coarse enough that scrolling them doesn't take too long - normal pots work well for this. Plus I can get pots cheap, the right size and I don't like the feel of encoders.

You surely are aware that for a PWM to DC conversion there will be ripple.
Yeah, I was thinking that I could extensively filter that out enough for it to be useful. I think the DAC is a better bet
Tektronix did that for their early microprocessor controlled oscilloscopes.  The potentiometer values were immediately digitized and then regenerated with a DAC with the microprocessor in the middle.  ADCs and DACs were expensive back then so both were multiplexed.  For the DAC, a multiplexer was used to connect it iteratively to a series of hold capacitors followed by JFET operational amplifiers configured as voltage followers.

So a DAC, 4051 multiplexer, and two TL074 quad operational amplifiers yield 8 output channels.  But today quad DACs are available at reasonable prices.

Keep in mind that potentiometer "settablity" is only just better than 8 bits and 10 bits is more than enough.  But this is a good match for common 12 bit converters because they are usually only linear to 10 bits anyway.  If you are hoping to get 12 bits, 1 part in 4096, out of single turn potentiometers, then you will be disappointed; they are just not that good.
That is what I considered first of all, what kind of hold capacitors were used? I know of an arrangement like this (https://www.electronicshub.org/sample-and-hold-circuit/) but it doesn't seem like it would hold a voltage for a long time

That's interesting that it's only about 8 bits in resolution. However, the purpose the of digitising and recalling the state is to match the voltage on the pot as closely as possible. Maybe a less accurate ADC would be ok, I'm not sure yet - I have to hear it in action to say whether I'm happy with it
 

Offline fcb

  • Super Contributor
  • ***
  • Posts: 2117
  • Country: gb
  • Test instrument designer/G1YWC
    • Electron Plus
Re: 12 Channel DAC sample and hold design
« Reply #12 on: February 21, 2020, 10:07:32 am »
Low parts count method: 3x MCP4728 (as someone pointed out)
Lowest parts cost: 12x PWM (can be done as with 4 muxes and 3 PWMs and some passives, with 0-25% range)

If you are doing POT>MICROCONTROLLER>DAC all the time, then linearity is not a big issue in reality, if you are doing substitution (switching from POT wiper to DAC), then you might need something better than MCP4728.
https://electron.plus Power Analysers, VI Signature Testers, Voltage References, Picoammeters, Curve Tracers.
 

Offline ve7xen

  • Super Contributor
  • ***
  • Posts: 1193
  • Country: ca
    • VE7XEN Blog
Re: 12 Channel DAC sample and hold design
« Reply #13 on: February 21, 2020, 11:36:39 pm »
I don't quite understand how this will operate.  Suppose a pot gives a voltage of say 3.14V, then the n-bit integer representation of 3.14V is obtained with the n-bit ADC and immediately put in the m-bit DAC as 3.14V?  Then if the 'store' button is pressed, the DAC value is saved in memory.  Now the pot voltage changes to 2.72V and the DAC outputs 2.72V, but shortly after, the 'recall' button is pressed, and the m-bit DAC output is now 3.14V?  If that is the case wouldn't be better to use quadrature encoders instead of pots to adjust the DAC outputs directly?
Normally, the voltage comes from the pot, when the recall button gets pressed, the voltage comes from the DAC. Quadrature encoders? I don't think so - the resolution has to be fine enough that you don't hear 'jumps' in the pitch and also coarse enough that scrolling them doesn't take too long - normal pots work well for this. Plus I can get pots cheap, the right size and I don't like the feel of encoders.

You surely are aware that for a PWM to DC conversion there will be ripple.
Yeah, I was thinking that I could extensively filter that out enough for it to be useful. I think the DAC is a better bet
Tektronix did that for their early microprocessor controlled oscilloscopes.  The potentiometer values were immediately digitized and then regenerated with a DAC with the microprocessor in the middle.  ADCs and DACs were expensive back then so both were multiplexed.  For the DAC, a multiplexer was used to connect it iteratively to a series of hold capacitors followed by JFET operational amplifiers configured as voltage followers.

So a DAC, 4051 multiplexer, and two TL074 quad operational amplifiers yield 8 output channels.  But today quad DACs are available at reasonable prices.

Keep in mind that potentiometer "settablity" is only just better than 8 bits and 10 bits is more than enough.  But this is a good match for common 12 bit converters because they are usually only linear to 10 bits anyway.  If you are hoping to get 12 bits, 1 part in 4096, out of single turn potentiometers, then you will be disappointed; they are just not that good.
That is what I considered first of all, what kind of hold capacitors were used? I know of an arrangement like this (https://www.electronicshub.org/sample-and-hold-circuit/) but it doesn't seem like it would hold a voltage for a long time

That's interesting that it's only about 8 bits in resolution. However, the purpose the of digitising and recalling the state is to match the voltage on the pot as closely as possible. Maybe a less accurate ADC would be ok, I'm not sure yet - I have to hear it in action to say whether I'm happy with it

You should be able to estimate the current out of the capacitor in very rough terms by looking at the chosen opamp's input bias current, capacitor leakage, and any leakage path back through the switch/mux. Once you have that, you can estimate the voltage change per time for a given value/type of capacitor, and use that to select an appropriate value / timing. Since I assume you'd still have a DAC sourcing the voltage into the S&H, you shouldn't need to hold the value for very long (10s of ms at most?) before you can refresh it. Low leakage type capacitors would normally be used here, probably a film or NP0 type in your case.

Edit: Example...not careful engineering here but to put some numbers on it...

TL074 has input bias current max of 7nA over the full temperature range.
A poly film cap should have leakage under 10nA
4051 off-state leakage current max is 100nA (!!)

So we expect leakage current < 117nA.

Capacitor voltage change with a constant current discharge is given by  $$\frac{1}{C}It$$ where C is capacitance, I is the discharge current, t is time in seconds.

So say you have a 470nF film capacitor, after 10ms your voltage will have changed about 2.5mV worst case.
« Last Edit: February 22, 2020, 12:03:39 am by ve7xen »
73 de VE7XEN
He/Him
 

Offline Ground_Loop

  • Frequent Contributor
  • **
  • Posts: 645
  • Country: us
Re: 12 Channel DAC sample and hold design
« Reply #14 on: February 22, 2020, 03:30:49 am »
I have a MIDI to CV controller that does just what you’re asking for on seven output channels by sequentially feeding the DAC (12 bit) output to charge capacitors on the input to FET op amp voltage followers. It scans them fast enough that the charge loss is imperceptible between scans.  I’ve also done something similar to sample white noise for a true random sample and hold function.
There's no point getting old if you don't have stories.
 

Offline jesuscf

  • Frequent Contributor
  • **
  • Posts: 499
  • Country: ca
Re: 12 Channel DAC sample and hold design
« Reply #15 on: February 22, 2020, 07:03:42 am »
I don't quite understand how this will operate.  Suppose a pot gives a voltage of say 3.14V, then the n-bit integer representation of 3.14V is obtained with the n-bit ADC and immediately put in the m-bit DAC as 3.14V?  Then if the 'store' button is pressed, the DAC value is saved in memory.  Now the pot voltage changes to 2.72V and the DAC outputs 2.72V, but shortly after, the 'recall' button is pressed, and the m-bit DAC output is now 3.14V?  If that is the case wouldn't be better to use quadrature encoders instead of pots to adjust the DAC outputs directly?
Normally, the voltage comes from the pot, when the recall button gets pressed, the voltage comes from the DAC. Quadrature encoders? I don't think so - the resolution has to be fine enough that you don't hear 'jumps' in the pitch and also coarse enough that scrolling them doesn't take too long - normal pots work well for this. Plus I can get pots cheap, the right size and I don't like the feel of encoders.

With incremental quadrature encoders arbitrary resolution can be achieved.  Also the amount of change can be adjusted programmatically depending on the speed of the rotation.   As for the feeling, there are quadrature encoders that 'click' and quadrature encoders that are smooth.

Homer: Kids, there's three ways to do things; the right way, the wrong way and the Max Power way!
Bart: Isn't that the wrong way?
Homer: Yeah, but faster!
 

Offline David Hess

  • Super Contributor
  • ***
  • Posts: 16621
  • Country: us
  • DavidH
Re: 12 Channel DAC sample and hold design
« Reply #16 on: February 28, 2020, 09:20:57 pm »
Tektronix did that for their early microprocessor controlled oscilloscopes.  The potentiometer values were immediately digitized and then regenerated with a DAC with the microprocessor in the middle.

More recent Tektronix oscilloscopes use encoders, which to me makes a lot more sense:

https://www.eevblog.com/forum/repair/tek-tds3000b-front-panel-encoders-are-these-custom-made/

Encoders were not common back then and would have been more expensive.  Their late 22xx series and 24xx series oscilloscopes also used dual potentiometers rotated out of phase on a single shaft as continuous encoders which worked very well.  If necessary, a potentiometer used as an encoder can also provide absolute positioning.

Based on the performance and reliability of the common mechanical encoders found on many products now, I think potentiometers are usually better.  What I do not understand is why nobody makes small quadrature optical encoders like those found in mice.
 

Offline David Hess

  • Super Contributor
  • ***
  • Posts: 16621
  • Country: us
  • DavidH
Re: 12 Channel DAC sample and hold design
« Reply #17 on: February 28, 2020, 09:48:03 pm »
That is what I considered first of all, what kind of hold capacitors were used? I know of an arrangement like this (https://www.electronicshub.org/sample-and-hold-circuit/) but it doesn't seem like it would hold a voltage for a long time.

Tektronix used 0.1 microfarad polyester film capacitors.  If we assume 10 bits (1000 counts) and 5 volts, then 5 millivolt resolution and 1 nanoamp of leakage would require updating every half second so not particularly demanding.  Doing significantly better requires some care in circuit layout and the environment to prevent excessive leakage on the surface of the printed circuit board.

At high temperatures, a better capacitor like polypropylene is required and CMOS or low input bias current bipolar (1) amplifiers do better than most JFET parts.  A different multiplexer than the cheap 4051 might be required.

(1) The input bias current of a bipolar input operational amplifier actually tends to decrease at high temperatures so low input bias current bipolar parts may even be preferred.  I used to use the LM11, sort of an improved LM308 low input bias current operational amplifier, for sample and hold circuits which had to operate at high temperature.  Today there are CMOS input parts which are almost as good like the LMC6081 series.
 

Offline jesuscf

  • Frequent Contributor
  • **
  • Posts: 499
  • Country: ca
Re: 12 Channel DAC sample and hold design
« Reply #18 on: February 29, 2020, 08:05:00 pm »
What I do not understand is why nobody makes small quadrature optical encoders like those found in mice.

They do!  For example:

https://www.bourns.com/docs/Product-Datasheets/em14.pdf

Quadrature optical encoders are very nice but also very expensive.

Homer: Kids, there's three ways to do things; the right way, the wrong way and the Max Power way!
Bart: Isn't that the wrong way?
Homer: Yeah, but faster!
 

Offline David Hess

  • Super Contributor
  • ***
  • Posts: 16621
  • Country: us
  • DavidH
Re: 12 Channel DAC sample and hold design
« Reply #19 on: March 02, 2020, 06:44:22 pm »
What I do not understand is why nobody makes small quadrature optical encoders like those found in mice.

They do!  For example:

https://www.bourns.com/docs/Product-Datasheets/em14.pdf

Quadrature optical encoders are very nice but also very expensive.

The ones used in mice are much less expensive because they are not as integrated; only the emitter and detectors are required.
 


Share me

Digg  Facebook  SlashDot  Delicious  Technorati  Twitter  Google  Yahoo
Smf