Hey everyone, I have a question regarding clock generation.
Description of the problem:
In the SNES (yes, the game console) there are currently 2 clocks, one for CPU and one for the APU, which are both highly unstable and varies a lot, for the purpose of emulation, these clocks are 21477272Hz and 24607104Hz respectfully. In our community we try to validate emulators with real hardware by syncing controller inputs and verify that the end result is the same, on the NES this isn't a problem, since there is only one clock, but for the snes it's a huge problem.
The greatest common divider between these clocks is 8Hz, which is a bad thing, since you will need to divide and multiply weirdly. And a small diversion initially will result in a huge difference afterwards, we can live with a certain difference between the original clock, but it's more important that the clocks stay in sync
Now the question we have is, what would be the best way to get these clocks, and keep them in sync? Would it be best to divide.a 10MHz reference to 1Hz, and start multiplying? And what would be the best method to multiply the signals, since the clock will be I the 24ish MHz range, and each multiplication stage needs to add the same delay, and then at the end we would need to multiply one clock probably by 1 a certain amount of times to keep in sync.