32.768kHz Pierce Crystal Oscillator?? For Nixie clock.

[floobydust]

For the high voltage traces and pads, I would go larger than 8mil spacing. Although solder mask is an insulator, the coating properties and thickness are not well controlled. I would try for 25mils.

[Mighty Burger]

As long as there's soldermask covering it, and it meets the fab rules, it's fine.

Tim

For the high voltage traces and pads, I would go larger than 8mil spacing. Although solder mask is an insulator, the coating properties and thickness are not well controlled. I would try for 25mils.

Thank you guys.
I'm using JLCPCB and it seems like they can manage it. I might as well, just so it's easier to get the ground plane better connected.

Also in KiCad I set all of the nets with a high voltage to have different clearances. The net that connects all of the common pins of the darlington arrays to the zener clamp, as well as all of the cathodes of the nixie tubes, will see as much as 90V relative to ground so I set its clearance to 25 mils, and the high voltage power supply for all of the nixies will be at 170V relative to ground so I set its clearance to 50 mils. Not sure if these clearances are excessive, I think I derived them from some online clearance calculator. But it looks like KiCad respects the clearances with the copper pours even if the pour itself has a small clearance, so I'll be fine.

[T3sl4co1l]

Sounds good. Don't be stingy with vias, they're cheap.  It doesn't take many -- just in strategic places -- to get a ground plane almost as good as a multilayer board.

Tim

[Mighty Burger]

I imagine routing this sort of circuit would be way easier on a four layer board, compared to a two layer board of the same size. It would probably make it radiate less junk I'm guessing?

Anyhow here's my design. I thought the product after being fully constructed with the wood case and all would look way better if the nixie tubes went right to the end of the board, so I chopped off the ends on the left and right side. I also moved the tubes to the middle of the board rather than the top, purely for aesthetics.
With those changes, as well as the new circuitry, there was more stuff that needed to be squished in less space. I found routing much more difficult this time around. I have lots of respect for the guys who route boards ten times the density of this one for a living.
I also used board-mounted switches and buttons, I thought this was better than having wires go to panel mounted stuff.

Let's talk about the weird oscillator part. I was tight on space so I put U11, the flip flop that takes the oscillator's 2Hz signal down to 1Hz, on the other side of the board. I figured it probably won't hurt anything, given the fact I didn't have a ground plane near the oscillator in my last design and it worked. Once I was done with the board I noticed there was a little bit of space around the oscillator section, enough to put a little fence around it. I've seen pictures of this sort of thing, where you have a strip of exposed ground plane (i think) in a ring around a sensitive part with some vias, and I think it's supposed to help block interference from going in or out?? I'm clueless about this stuff clearly, and I have no clue why exposing soldermask in a ring would do anything, but even if the fence isn't very helpful it shouldn't do any harm right?

One last thing. On the top right I have a PTH for soldering a wire labeled "Ground Connection". I think I am going to use a metal sheet on the bottom and rear of the clock and I'm pretty sure having it connected to circuit ground would be smart. Not only for potentially being a little safer and helping prevent interference (I think?), but also because I have the shield of the USB C port connected to ground, and I don't want intermittent weird stuff going on when that port comes in and out of contact with the metal sheet, connecting and disconnecting the sheet to circuit ground.

Thoughts?

[T3sl4co1l]

Oh, my first reaction was "you're going to put a shield can over that?!"

Exposed metal sinks surface leakage currents, but even with poor soldering and no cleaning, you can expect to work with megohms pretty confidently.  32k crystals are around 100s kohms so it's well inside of the range to worry about.

If it's a metal can crystal, add a pad to tack solder it, that takes care of a lot of capacitive coupling.  Again, increasing capacitance to the traces doesn't matter at all, as long as it's less than the total nominal load capacitance.  Just change the shunt caps to compensate.  More shielding (ground pour, covering metal, whatever) only improves immunity.

I think this can still be done in a single sided placement, but it would be even tighter then, as you say.

I think I would place the tubes on the board where they fit best, and adjust the woodwork around them to keep it visually centered, but that's me.  I also don't have a model of what you're working with, and this might be the more pleasing solution, I don't know.

Keep in mind some tricks to reduce routing pressure.  For example that D2 can be duplicated between, say, every pair or triplet of drivers, so you don't have to route it around between all of them.

I think I'm seeing big gaps in ground support.  For example under "U14" (the label), a peninsula of ground dead-ends; on the other side, U13 has some ground nearby, but I don't think it extends up far enough, and in any case I don't see a via between them.  So the nearest ground, to any copper in that area, is either downwards (behind the chips) or all the way left or right, around the chips and associated routing, and on the top around the tubes as well, to that area.  It's a huge open loop, which can be a problem for EMI (again, unlikely in this case -- more as an example of best practice).

Oh, may want to revise those footprints, the pin-1 indicator -- it's only a circle underneath the chip.  How are you going to inspect that once it's placed? A dot beside the pin, say, below and to the left (again referring to U14 and friends), is a typical way to show that. Could also be a number (although then you have to orient it for every damn part that's turned, so it still reads right..?); or the outline drawn (currently just corners I guess) can stick out enough to be visible, and could show a semicircle on the pin-1 end, etc.

Tim

[Mighty Burger]

Thanks for the advice! I've revised the design.

Oh, my first reaction was "you're going to put a shield can over that?!"

Definitely not Are those guard rings normally used in conjunction with shields?

Exposed metal sinks surface leakage currents, but even with poor soldering and no cleaning, you can expect to work with megohms pretty confidently.  32k crystals are around 100s kohms so it's well inside of the range to worry about.

I'm assuming you mean it's in the range I don't have to worry about, i.e. the guard ring wasn't necessary? Sorry the language was a little unclear

Keep in mind some tricks to reduce routing pressure.  For example that D2 can be duplicated between, say, every pair or triplet of drivers, so you don't have to route it around between all of them.

This definitely would have made it easier.
I thought it'd be better to go ahead and route all the difficult jungley stuff before I do the simple, repetitive stuff like placing the bypass caps next to the chips and connecting all the darlington arrays to the zener because I thought it'd be easier - it wasn't. All it did was make the simple stuff hard, and it really didn't make a difference in how hard it was to route the stuff that was difficult in the first place. Good to know this for next time I route a board though!

I think I'm seeing big gaps in ground support.  For example under "U14" (the label), a peninsula of ground dead-ends; on the other side, U13 has some ground nearby, but I don't think it extends up far enough, and in any case I don't see a via between them.  So the nearest ground, to any copper in that area, is either downwards (behind the chips) or all the way left or right, around the chips and associated routing, and on the top around the tubes as well, to that area.  It's a huge open loop, which can be a problem for EMI (again, unlikely in this case -- more as an example of best practice).

So ground "peninsulas" are bad for EMI?
I took care of that particular example by shoving the traces above U13 (push and shove routing is really neat) and nailing down some vias.
I also looked around the board for a little bit and got rid of some peninsulas that were unnecessary, i.e. didn't connect to the GND pad of any component.
Also redid the via stitching to spread it out a lot more, rather than only have a few points where the planes are connected. Not sure if this is an improvement.

Thankfully, since everything outside of the oscillator area and the 170V power supply module runs at a frequency of 1Hz or less (unless someone has a field day with one of the buttons ) I think I have plenty of room for error.

Oh, may want to revise those footprints, the pin-1 indicator -- it's only a circle underneath the chip.  How are you going to inspect that once it's placed? A dot beside the pin, say, below and to the left (again referring to U14 and friends), is a typical way to show that. Could also be a number (although then you have to orient it for every damn part that's turned, so it still reads right..?); or the outline drawn (currently just corners I guess) can stick out enough to be visible, and could show a semicircle on the pin-1 end, etc.

Oh gosh I had a mini heart attack when I read that first part, I thought I was about to have to redesign the board like when I got the nixie footprint wrong the first time around!
I just moved the circle to the outside of the chip.
I actually just modified the footprints from a digikey library I somehow ended up using (same one as last design so it works fine) and I think the footprints didn't even have a circle originally. If you look really closely you can see the corner with pin one has an extra line, and that's how pin 1 is indicated. A little too hard for me to see imo.

Thank you!

[T3sl4co1l]

Definitely not Are those guard rings normally used in conjunction with shields?

Sorta -- SMT shield cans use a footprint like that.  Basically just the metal edge of an open (5-sided) box, butt-jointed to the PCB, or maybe a small flange.  Rectangular cans are usually stocked, so it's possible; but a weird outline like that would probably be custom.  Hence the reaction.

I'm assuming you mean it's in the range I don't have to worry about, i.e. the guard ring wasn't necessary? Sorry the language was a little unclear

Heh, yes... those words were not chosen well. The "bad" range is an open interval (e.g. > 1Mohm) so it feels "outside" while the safe range is closed (say -1M to 1M) which feels "inside", that's where that came from..

So ground "peninsulas" are bad for EMI?
I took care of that particular example by shoving the traces above U13 (push and shove routing is really neat) and nailing down some vias.
I also looked around the board for a little bit and got rid of some peninsulas that were unnecessary, i.e. didn't connect to the GND pad of any component.
Also redid the via stitching to spread it out a lot more, rather than only have a few points where the planes are connected. Not sure if this is an improvement.

Not so much that they're bad, just that they aren't doing anything for you, and generally mean there's a gap or loop nearby.

RF currents flow between a trace (signal current) and ground (image current).  Ground proximity is key.

A trace running across a slot or hole in the ground plane, is no longer close to its image.  The image current has to flow around the edges of the loop, taking a much longer distance, and coupling into a larger field -- potentially a radiating field, as an antenna.  (These are called "slot antennas" when made intentionally. Or unintentionally, too, I suppose.)

Note that, between the pairs of chips on top and bottom, there's a big hole in the ground plane.  You can train your eye to see positive space (traces and footprints) as negative space in the ground pour, and vice versa.

To the trace, the lack of ground proximity, manifests as an increase in its impedance -- or at low frequencies, as stray inductance.  So it has some effect on signal quality as well.

Again, hardly an issue with CD4000 family logic, with ~100ns edges (so slow, you need 10s of meters of cable to see any wave effects), and already high impedances (pin drivers ~250 ohms at 10V, compared to trace impedances being in the 50-150 ohm ballpark), but worth thinking about with microcontrollers and 74HC and faster logic; and mandatory if you find yourself working with the good stuff (fast CMOS, ECL, LVDS..).


You are swapping layers frequently (like, horizontally, between the pairs of drivers), and without a transparent view I'm not sure if that's necessary (there is stuff on the other side), or if it's, in part, an effort to get more ground fill?  But that's something that can help.  Downside is it does use up more vias for the signal traces.  (Which, I don't think is much of a reliability problem, and with stitching, you're using plenty of vias already, right?)

If you're not routing around components, it's fine to keep everything largely on the same layer (switching layers only where needed to cross traces, say); as long as there's ground available underneath it, you're golden.  Same-side ground doesn't do nearly as much as opposite-side ground does -- the edge-wise coupling between traces, or trace and ground fill, is fairly mild.

Thankfully, since everything outside of the oscillator area and the 170V power supply module runs at a frequency of 1Hz or less (unless someone has a field day with one of the buttons ) I think I have plenty of room for error.

Interestingly enough, while edge rates do matter (and, again, are hardly an issue here because they're so slow!), a repeat rate that low is probably low enough that it might get away with a lot, even with a noisy design (fast logic family, poor layout).  The reason is, EMI testing is done with a certain receiver response, which averages over modest time scales; a crash of noise every second will average down to much less than a peak-detect receiver.  Also, if the receiver is doing scans faster than 1 sec per band, it might simply skip over -- that is, when it was measuring a frequency, no noise happened to coincide, so it reads really low, but the next sample say catches the whole peak or something.  The plot ends up spiky, but it's not because of harmonics!

Not that that's a good thing, the intermittent popping sound will still be just as irritating to affected radio channels.  One of those kind of "meets the word of [the law], but not the spirit" things.

Oh gosh I had a mini heart attack when I read that first part, I thought I was about to have to redesign the board like when I got the nixie footprint wrong the first time around!
I just moved the circle to the outside of the chip.

I probably shouldn't be playing the pronoun game either...

Cheers!
Tim

[Mighty Burger]

Not so much that they're bad, just that they aren't doing anything for you, and generally mean there's a gap or loop nearby.

RF currents flow between a trace (signal current) and ground (image current).  Ground proximity is key.

A trace running across a slot or hole in the ground plane, is no longer close to its image.  The image current has to flow around the edges of the loop, taking a much longer distance, and coupling into a larger field -- potentially a radiating field, as an antenna.  (These are called "slot antennas" when made intentionally. Or unintentionally, too, I suppose.)

Note that, between the pairs of chips on top and bottom, there's a big hole in the ground plane.  You can train your eye to see positive space (traces and footprints) as negative space in the ground pour, and vice versa.

To the trace, the lack of ground proximity, manifests as an increase in its impedance -- or at low frequencies, as stray inductance.  So it has some effect on signal quality as well.

Again, hardly an issue with CD4000 family logic, with ~100ns edges (so slow, you need 10s of meters of cable to see any wave effects), and already high impedances (pin drivers ~250 ohms at 10V, compared to trace impedances being in the 50-150 ohm ballpark), but worth thinking about with microcontrollers and 74HC and faster logic; and mandatory if you find yourself working with the good stuff (fast CMOS, ECL, LVDS..).

Whoa -- I had no idea about these sorts of effects!
While I understand the specific points you've brought up, overall I am in the dark in terms of RF, and how it works with PCB design. Hence me originally not having any ground plane, then putting a fence around the 32kHz oscillator Is there a place I can get started with learning the basics of RF black magic? Not that it's necessary for this particular project, but the topic just seems really interesting and it could come in handy for future projects where I need to worry about this kind of stuff. Or is this something that's too convoluted so I should just wait for college?

With the signal current and image current, and impedance stuff - is that the reason why some traces on a computer motherboard are squiggly? So the signal and image traces are the same length?
Here's an image of what I'm talking about

You are swapping layers frequently (like, horizontally, between the pairs of drivers), and without a transparent view I'm not sure if that's necessary (there is stuff on the other side), or if it's, in part, an effort to get more ground fill?  But that's something that can help.  Downside is it does use up more vias for the signal traces.  (Which, I don't think is much of a reliability problem, and with stitching, you're using plenty of vias already, right?)

If you're not routing around components, it's fine to keep everything largely on the same layer (switching layers only where needed to cross traces, say); as long as there's ground available underneath it, you're golden.  Same-side ground doesn't do nearly as much as opposite-side ground does -- the edge-wise coupling between traces, or trace and ground fill, is fairly mild.

Yes, I did switch layers often for that very reason, to get the ground fill everywhere. I should be fine without doing this in the future?
Looking back at the board, I think if I didn't do all of that layer switching as much the final board might've turned out better. Though I don't think it's worth changing it now unless I need to go back and do other major modifications to the board.
And yes, currently I have a grand total of 314 vias I don't think JLCPCB charges any extra for excess vias until they have to drill more than 1000 holes on a single board.
Also for your viewing (dis)pleasure here are the transparent views:

Interestingly enough, while edge rates do matter (and, again, are hardly an issue here because they're so slow!), a repeat rate that low is probably low enough that it might get away with a lot, even with a noisy design (fast logic family, poor layout).  The reason is, EMI testing is done with a certain receiver response, which averages over modest time scales; a crash of noise every second will average down to much less than a peak-detect receiver.  Also, if the receiver is doing scans faster than 1 sec per band, it might simply skip over -- that is, when it was measuring a frequency, no noise happened to coincide, so it reads really low, but the next sample say catches the whole peak or something.  The plot ends up spiky, but it's not because of harmonics!

Not that that's a good thing, the intermittent popping sound will still be just as irritating to affected radio channels.  One of those kind of "meets the word of [the law], but not the spirit" things.

Interesting stuff!
There's one major concern I have about selling this project - what if it somehow emits tons of EMI and starts messing with people's devices? I've heard that could land people in big trouble. But there's absolutely no way I'm going to spend ten grand for a product I'd be surprised (pleasantly) if I sold more than five units. Maybe I pull that one trick and market it as a pre-assembled kit, or something.
But then again, with the slow repeat rate and super slow edge rates (I was completely unaware that CD4000 logic was that slow, guess that's a good thing!) it won't emit more than a bee's dick of EMI
But then again again I kinda threw on a random 170V SMPS and I think it makes a slightly audible noise in operation, so that might be spewing out stuff continuously...


Well, do you think the board is good enough to be bought and put into use at this point?
I really appreciate all of the advice you've been giving me, thanks.

[T3sl4co1l]

Whoa -- I had no idea about these sorts of effects!
While I understand the specific points you've brought up, overall I am in the dark in terms of RF, and how it works with PCB design. Hence me originally not having any ground plane, then putting a fence around the 32kHz oscillator Is there a place I can get started with learning the basics of RF black magic? Not that it's necessary for this particular project, but the topic just seems really interesting and it could come in handy for future projects where I need to worry about this kind of stuff. Or is this something that's too convoluted so I should just wait for college?

Never too early to start thinking and reading about it.  Developing a feel for fields and waves is a valuable skill, and it won't come overnight!

I don't have any good book recommendations unfortunately, but perhaps others can chime in.

With the signal current and image current, and impedance stuff - is that the reason why some traces on a computer motherboard are squiggly? So the signal and image traces are the same length?
Here's an image of what I'm talking about

Sort of.  The fact that the board is multilayer, and the traces are routed over or between solid planes, and that they are of consistent width, and spaced adequately, is what's most important.  The squiggles are to match delays, so that the waves propagating down each trace in a bus arrive at their destinations at the same time.

As for the differential pairs, you want to route their traces identically -- first of all, obviously you want to avoid routing the pair over some disturbance, like a gap between planes, or underneath a noisy power converter.  If you can't avoid it, then you want the noise in each trace to match, so they get subtracted out at the receiver.  The fact that the waves created by those disturbances, arrive at the receiver at the same time, means they will be ignored.  At least while the disturbance is small (maybe a volt or less) -- it still has to fit within the receiver's voltage range.

Waves propagate along the traces at equal velocity (they're on the same PCB and have the same geometry), so it's just a matter of keeping the lengths matched, from the transmitter, to any noise source, to the receiver.

Yes, I did switch layers often for that very reason, to get the ground fill everywhere. I should be fine without doing this in the future?

I try to prioritize single side placement -- that saves an additional assembly step.  For a hand soldered assembly, meh, not a huge deal, but it's another buck here and there in commercial applications.

Then there's not much that obstructs the bottom side, and it can be used largely for ground.

If I am doing double sided placement, I want to ask myself some other minimization problem: how much board area do I need, to get a reasonable design (in terms of functional, thermal and EMI performance, say)?  How many parts can I group in what arrangement, without running out of routing area?

But, that is me, and I have plenty of time to think about things while I'm idly poking at a design.  Others, I know they just want the stupid thing done, damn the style; artwork, what's that?

Whatever level you're working at, you need to develop a toolbox of skills you are fluent with, and how to apply them.  A lot of EEs don't develop a feel for fields; that can be compensated with more time spent testing or iterating.  (Maybe not the least cost option, but that's for the managers to deal with...  )

Looking back at the board, I think if I didn't do all of that layer switching as much the final board might've turned out better. Though I don't think it's worth changing it now unless I need to go back and do other major modifications to the board.
And yes, currently I have a grand total of 314 vias I don't think JLCPCB charges any extra for excess vias until they have to drill more than 1000 holes on a single board.

Yeah, that's about right for something that size.  Like I said, I'd probably find a more optimal arrangement, preferably single sided, but barring something we've both missed -- you definitely have something buildable there.

There's one major concern I have about selling this project - what if it somehow emits tons of EMI and starts messing with people's devices? I've heard that could land people in big trouble. But there's absolutely no way I'm going to spend ten grand for a product I'd be surprised (pleasantly) if I sold more than five units. Maybe I pull that one trick and market it as a pre-assembled kit, or something.
But then again, with the slow repeat rate and super slow edge rates (I was completely unaware that CD4000 logic was that slow, guess that's a good thing!) it won't emit more than a bee's dick of EMI
But then again again I kinda threw on a random 170V SMPS and I think it makes a slightly audible noise in operation, so that might be spewing out stuff continuously...

Theory meets practice on law enforcement...   I've heard of products produced on the 10k unit scale that went without testing, and apparently without complaint, so it's not impossible... that doesn't mean they passed accidentally, just that no one a. had a persistent problem that was b. traceable to the product.

So, the way the law on this (in the US) works is, AFAIK:
- Sometimes the FCC drives around, listening for things.  With their budget and priorities these days, this doesn't happen very often.
- More often, a licensed user -- who takes legal priority, and has authority to file a complaint with the FCC, who then sends a C&D -- complains, and then most often the user simply stops using the offending thing.  Assuming they figure out the culprit of course, which may not be obvious.
- If it's persistent, it can escalate to fines and so on.
- And there are clauses for tracing it back to the supplier of an offending product.

So, you need the combination of a customer, and a potential victim that is licensed, and enough complaints to bring it back to you.  Or for Part 15 compliance, I honestly don't remember what the deal is, but I'm guessing?- a non-licensed user can complain of interference in relevant bands (broadcast radio for an important example; listeners are of course users of licensed bandwidth in that case), in which case the FCC may decide to investigate further, or may let it sit unless they get repeat complaints, etc.  (Rules are different by band, for example the Part 15 permitted unlicensed emissions in ISM bands (13.56MHz, 2.45GHz, etc.) are higher than elsewhere, but still limited to fairly harmless levels.)

Mind, this is not a professional assessment or recommendation.  It's a business decision, and like any other, incurs risk -- there's nothing life-changing about violating a law, it's just another cost of operation.  (Indeed, legal defenses -- whether vs. civil or state -- are accounted as just another operating expense.)

In short, I would be very, very surprised if this ended up so bad that someone just happened to complain about it, and it ultimately came back to you as a direct liability.

The HV converter is indeed the elephant in the board, and it might be cheap insurance for example to add an LC around it, both ends.  At best, jumper the L's and no-pop the C's; at worst, put in values large enough to deal with it.  The module being small means it shouldn't radiate too horribly, even if made badly.

Tim

[Mighty Burger]

Never too early to start thinking and reading about it.  Developing a feel for fields and waves is a valuable skill, and it won't come overnight!

I don't have any good book recommendations unfortunately, but perhaps others can chime in.

I'm hoping lots of the intuition I'm gaining will be helpful during college. I've heard EE is a tough curriculum for many students, and I'm already getting pretty weary of academia. Maybe having a little more focus on the interesting stuff will be helpful too.

Sort of.  The fact that the board is multilayer, and the traces are routed over or between solid planes, and that they are of consistent width, and spaced adequately, is what's most important.  The squiggles are to match delays, so that the waves propagating down each trace in a bus arrive at their destinations at the same time.

As for the differential pairs, you want to route their traces identically -- first of all, obviously you want to avoid routing the pair over some disturbance, like a gap between planes, or underneath a noisy power converter.  If you can't avoid it, then you want the noise in each trace to match, so they get subtracted out at the receiver.  The fact that the waves created by those disturbances, arrive at the receiver at the same time, means they will be ignored.  At least while the disturbance is small (maybe a volt or less) -- it still has to fit within the receiver's voltage range.

Waves propagate along the traces at equal velocity (they're on the same PCB and have the same geometry), so it's just a matter of keeping the lengths matched, from the transmitter, to any noise source, to the receiver.

This is really interesting stuff. What kind of signals are sent through differential pairs?
This is similar to the theory behind balanced XLR cables right?, where there are two copies of the same audio signal but one is reverse polarity, and since any induced noise will be identical it can be cancelled out by switching the polarity of that audio signal back again and summing them together. I thought that was the coolest thing when I read about it.

I try to prioritize single side placement -- that saves an additional assembly step.  For a hand soldered assembly, meh, not a huge deal, but it's another buck here and there in commercial applications.

Then there's not much that obstructs the bottom side, and it can be used largely for ground.

If I am doing double sided placement, I want to ask myself some other minimization problem: how much board area do I need, to get a reasonable design (in terms of functional, thermal and EMI performance, say)?  How many parts can I group in what arrangement, without running out of routing area?

But, that is me, and I have plenty of time to think about things while I'm idly poking at a design.  Others, I know they just want the stupid thing done, damn the style; artwork, what's that?

Whatever level you're working at, you need to develop a toolbox of skills you are fluent with, and how to apply them.  A lot of EEs don't develop a feel for fields; that can be compensated with more time spent testing or iterating.  (Maybe not the least cost option, but that's for the managers to deal with...  )

I do plan on hand soldering these, with just the iron (don't own a hot air station let alone a reflow oven), so just in terms of assembly double sided isn't too big of a deal.
For commercial applications, I'd imagine the savings from having components on only one side would far outweigh the extra cost of a slightly larger PCB ..
I'll be honest, I didn't really do much thinking when I shrunk the board, I just saw lots of green space and thought hey, it wouldn't hurt to shrink this, might even look nicer with the option of having the nixies go right to the edge of the device. I think I just googled images of nixie clocks and decided I liked the looks of the ones that had the tubes go to the edge.  I don't think any amount of woodworking trickery could pull that off with my previous design with the larger board. The tiny board size is just for aesthetics honestly.
There's definitely something to appreciate about doing a professional job the right way. It's nice to make things you can be proud of.

Yeah, that's about right for something that size.  Like I said, I'd probably find a more optimal arrangement, preferably single sided, but barring something we've both missed -- you definitely have something buildable there.

Awesome!! I'm excited.
Without increasing the board size I'd imagine I'd have to get pretty creative to fit everything in there on one side. With enough time, patience and careful routing I could probably pull it off, I'm sure it'd be a cakewalk for someone with more experience.

Theory meets practice on law enforcement...   I've heard of products produced on the 10k unit scale that went without testing, and apparently without complaint, so it's not impossible... that doesn't mean they passed accidentally, just that no one a. had a persistent problem that was b. traceable to the product.

So, the way the law on this (in the US) works is, AFAIK:
- Sometimes the FCC drives around, listening for things.  With their budget and priorities these days, this doesn't happen very often.
- More often, a licensed user -- who takes legal priority, and has authority to file a complaint with the FCC, who then sends a C&D -- complains, and then most often the user simply stops using the offending thing.  Assuming they figure out the culprit of course, which may not be obvious.
- If it's persistent, it can escalate to fines and so on.
- And there are clauses for tracing it back to the supplier of an offending product.

So, you need the combination of a customer, and a potential victim that is licensed, and enough complaints to bring it back to you.  Or for Part 15 compliance, I honestly don't remember what the deal is, but I'm guessing?- a non-licensed user can complain of interference in relevant bands (broadcast radio for an important example; listeners are of course users of licensed bandwidth in that case), in which case the FCC may decide to investigate further, or may let it sit unless they get repeat complaints, etc.  (Rules are different by band, for example the Part 15 permitted unlicensed emissions in ISM bands (13.56MHz, 2.45GHz, etc.) are higher than elsewhere, but still limited to fairly harmless levels.)

Mind, this is not a professional assessment or recommendation.  It's a business decision, and like any other, incurs risk -- there's nothing life-changing about violating a law, it's just another cost of operation.  (Indeed, legal defenses -- whether vs. civil or state -- are accounted as just another operating expense.)

In short, I would be very, very surprised if this ended up so bad that someone just happened to complain about it, and it ultimately came back to you as a direct liability.

The HV converter is indeed the elephant in the board, and it might be cheap insurance for example to add an LC around it, both ends.  At best, jumper the L's and no-pop the C's; at worst, put in values large enough to deal with it.  The module being small means it shouldn't radiate too horribly, even if made badly.

Fun fun. Hopefully this doesn't emit too much, someone with a vengeance notices, all the planets align and I end up in a bad spot, but it's reassuring to hear that that isn't likely.
One of Trump's things is reducing regulations, maybe this is something he can look at Really though, it'd be nice for people who don't have the means of EMI testing to not have to have that unlikely, but awful danger looming.

To be honest, I have no idea how I'd start designing that LC filter. If it helps, the HV converter already has two honkin capacitors:

With a quick continuity test, the one on the left is connected between the +5V input and GND, and the one on the right is between the 170V output and GND, just what you'd expect. I don't have a device that can measure their capacitance. If I could use those as part of the filter and just throw on a couple coils it'd probably save the price of a capacitor that can handle that voltage, though I don't know if those caps would be on the wrong side of the LC filter. I've never dealt with inductors or LC filters before and I have no intuition on what values to use. Would it need testing or do you know of some values that are likely to work well and suppress potential EMI?

[T3sl4co1l]

This is really interesting stuff. What kind of signals are sent through differential pairs?
This is similar to the theory behind balanced XLR cables right?, where there are two copies of the same audio signal but one is reverse polarity, and since any induced noise will be identical it can be cancelled out by switching the polarity of that audio signal back again and summing them together. I thought that was the coolest thing when I read about it.

Yeah, same thing, though audio doesn't have to worry much about light speed -- it takes a lot of cable length for 20kHz to go through much phase shift, and higher frequencies can simply be filtered out (though sometimes... or often... they aren't, and you hear random radio transmissions in your powered speakers, for instance?).

The kinds of signals, on a motherboard, are most likely PCIe.  This is a bit-serial protocol, so that the lanes don't have to be synchronized, they can arrive at somewhat different times.  Apparently the one pair has much less distance to cover than the other ones, so they had to put accordions in to make it longer; or the designer just felt like wiggling it around even though it was already within range (just to get it closer), who knows.

Or maybe it's not a PC motherboard at all, maybe it's an oscilloscope motherboard, which has differential pairs carrying the analog inputs from the front-end circuitry to the digital converter.  (Which don't really have to be matched, the delays can be tweaked in software -- most scopes have a feature where you can set this, to account for different length probes, for example.  But eh, maybe they still want matched lengths to be nice, or to get matched losses as well as delays?)

Shrug, there's a lot of give-and-take.  IC designers don't want to spend a lot of complexity fixing problems that PCB layouts should've solved in the first place; but sometimes they have to.  This has a long history, compare for example the pinouts of CD4000 and 7400 series logic ICs -- most CD4000 is made for easiest die layout, and the pins are just bonkers (see the sequence of outputs on the 4017 counter-decoder).  Earlier 7400 did better, but later 7400 improved even further: compare 74273 to 74LS574).  That's a pretty simple example, back from the days where die area was at a premium, for various reasons; nowadays, die area is relatively cheap (depends more on the process node you're using), and it saves a hell of a lot more space laying out a chip for an easy PCB layout.

Then again, there's so many MCUs with IO ports just fucking all over the chip (MSP430 and STM32 come to mind).  Who knows...

To be honest, I have no idea how I'd start designing that LC filter. If it helps, the HV converter already has two honkin capacitors:
[image]
With a quick continuity test, the one on the left is connected between the +5V input and GND, and the one on the right is between the 170V output and GND, just what you'd expect. I don't have a device that can measure their capacitance. If I could use those as part of the filter and just throw on a couple coils it'd probably save the price of a capacitor that can handle that voltage, though I don't know if those caps would be on the wrong side of the LC filter. I've never dealt with inductors or LC filters before and I have no intuition on what values to use. Would it need testing or do you know of some values that are likely to work well and suppress potential EMI?

A filter needs three inputs:
Impedance (input and output)
Cutoff frequency
Sharpness (prototype and order, or some attenuation at some other frequency, etc.)

Nice thing is the cutoff doesn't have to be very precise for EMI.  You can basically toss on a 1uH 1A chip inductor and say it's probably fine, for the 5V side.  Maybe a 10uF electrolytic after that.  So, it goes C, L, converter.  Similarly, on the output, maybe it goes converter, 100uH, 10nF (maybe a 250V film cap, maybe with say 3.3 ohms in series with it).

There's a bit of algebra concerning input and output impedances, but the most important relation underlying it is Zo = sqrt(L/C).  Exactly which L and C you should pick, also depends (in the middle of a filter network, you generally have to bisect individual components -- think of it as, in a CLC filter say, half the L works with the first C, and half with the other).

Frequency of course is 1 / (2 pi sqrt(L C)), and you need to pick the right L and C by the same rules, of course.

If the capacitors on that module are quite large (seems an okay assumption for now), then if we use much smaller C's outside, we can ignore the module caps by saying they're just "large".  Treat it as an AC short circuit.  We have L and C in series off of it, a nice simple network.  No bisection we need to worry about.  L is L, and C is C.

We don't want them to resonate, so we need an impedance to terminate them into.  This is pretty free; we generally want a low impedance -- since this is around the impedance seen by the rest of the circuit.  The nixies won't mind a few hundred ohms, of course, so we have a lot of freedom on that side; on the 5V side, we should keep it low, say less than 20% of the DC load equivalent (say if it draws 5V at 1A, that's 5 ohms, so 1 ohm would be fine).

By "impedance seen by circuit", consider a step change in voltage on the 5V rail, or 170V rail -- how much current is drawn in the instant surrounding that step change?  Z = dV/dI.  If you want tight supply regulation, you need a low impedance, so you want to design the filter for a low impedance in that case.

Ideally, we'd have a load resistor that serves as termination, but our load is probably higher impedance than the filter (partly due to the above suggestion), so what do we do?  If we leave it alone, it can resonate, and end up with a transmission peak around the cutoff point; that's not good!

If we simply put R in series with C, we can introduce damping resistance, without consuming DC current, and without relying on the load.

If we use the entire C as an R+C, we lose some high frequency filtering -- at very high frequencies, the capacitive reactance goes towards zero, so the equivalent circuit is an L dividing into an R -- a 1st order lowpass filter, not 2nd order.  (It's worse than that, for a number of factors, actually; we choose components small enough that these parasitic effects are either negligible, or expected to fall at a higher frequency than the converter creates.)

So a better option is using a smaller C in parallel with a larger C with loss, i.e., C || (R+C).  I don't think this is important here, but it's nice to know.  (Typically the lossy C is >= 3 times the parallel C; this gives good damping at the cutoff frequency.)

What's the significance of an electrolytic capacitor?  It comes with ESR for free, that's all.  A ceramic of the same value, with about 0.33 ohm wired in series, would also do.

Tim

[Mighty Burger]

To be honest, I have no idea how I'd start designing that LC filter. If it helps, the HV converter already has two honkin capacitors:
[image]
With a quick continuity test, the one on the left is connected between the +5V input and GND, and the one on the right is between the 170V output and GND, just what you'd expect. I don't have a device that can measure their capacitance. If I could use those as part of the filter and just throw on a couple coils it'd probably save the price of a capacitor that can handle that voltage, though I don't know if those caps would be on the wrong side of the LC filter. I've never dealt with inductors or LC filters before and I have no intuition on what values to use. Would it need testing or do you know of some values that are likely to work well and suppress potential EMI?

A filter needs three inputs:
Impedance (input and output)
Cutoff frequency
Sharpness (prototype and order, or some attenuation at some other frequency, etc.)

Nice thing is the cutoff doesn't have to be very precise for EMI.  You can basically toss on a 1uH 1A chip inductor and say it's probably fine, for the 5V side.  Maybe a 10uF electrolytic after that.  So, it goes C, L, converter.  Similarly, on the output, maybe it goes converter, 100uH, 10nF (maybe a 250V film cap, maybe with say 3.3 ohms in series with it).

There's a bit of algebra concerning input and output impedances, but the most important relation underlying it is Zo = sqrt(L/C).  Exactly which L and C you should pick, also depends (in the middle of a filter network, you generally have to bisect individual components -- think of it as, in a CLC filter say, half the L works with the first C, and half with the other).

Frequency of course is 1 / (2 pi sqrt(L C)), and you need to pick the right L and C by the same rules, of course.

If the capacitors on that module are quite large (seems an okay assumption for now), then if we use much smaller C's outside, we can ignore the module caps by saying they're just "large".  Treat it as an AC short circuit.  We have L and C in series off of it, a nice simple network.  No bisection we need to worry about.  L is L, and C is C.

We don't want them to resonate, so we need an impedance to terminate them into.  This is pretty free; we generally want a low impedance -- since this is around the impedance seen by the rest of the circuit.  The nixies won't mind a few hundred ohms, of course, so we have a lot of freedom on that side; on the 5V side, we should keep it low, say less than 20% of the DC load equivalent (say if it draws 5V at 1A, that's 5 ohms, so 1 ohm would be fine).

By "impedance seen by circuit", consider a step change in voltage on the 5V rail, or 170V rail -- how much current is drawn in the instant surrounding that step change?  Z = dV/dI.  If you want tight supply regulation, you need a low impedance, so you want to design the filter for a low impedance in that case.

Ideally, we'd have a load resistor that serves as termination, but our load is probably higher impedance than the filter (partly due to the above suggestion), so what do we do?  If we leave it alone, it can resonate, and end up with a transmission peak around the cutoff point; that's not good!

If we simply put R in series with C, we can introduce damping resistance, without consuming DC current, and without relying on the load.

If we use the entire C as an R+C, we lose some high frequency filtering -- at very high frequencies, the capacitive reactance goes towards zero, so the equivalent circuit is an L dividing into an R -- a 1st order lowpass filter, not 2nd order.  (It's worse than that, for a number of factors, actually; we choose components small enough that these parasitic effects are either negligible, or expected to fall at a higher frequency than the converter creates.)

So a better option is using a smaller C in parallel with a larger C with loss, i.e., C || (R+C).  I don't think this is important here, but it's nice to know.  (Typically the lossy C is >= 3 times the parallel C; this gives good damping at the cutoff frequency.)

What's the significance of an electrolytic capacitor?  It comes with ESR for free, that's all.  A ceramic of the same value, with about 0.33 ohm wired in series, would also do.

Tim

Good stuff. Thank you.
I'll be honest, I had to read through this multiple times to understand. My limited electronics knowledge and intuition is starting to become a limiting factor.

Here's the updated power supply schematic:

C4 is electrolytic.
Is there a particular reason why C17 should be a film capacitor? Limiting to SMD parts and having a minimum purchase quantity no greater than 1, I was able to find equivalent ceramic capacitors that are 10nF and can sustain 250V for significantly less money on digikey than film capacitors.
Like you said, the nice thing about this is if it doesn't work somehow, I can just depopulate the caps (and R27) and jump the inductors.

If it matters, here are some digikey parts I found, I do not know if they have some fatal flaw I didn't notice:
- 1uH Inductor: https://www.digikey.com/product-detail/en/samsung-electro-mechanics/CIGT252010LM1R0MNE/1276-6939-1-ND/7041339
- 100uH Inductor: https://www.digikey.com/product-detail/en/tdk-corporation/MLZ2012N101LTD25/445-181376-1-ND/9740582
- 10nF 250V Film Capacitor: https://www.digikey.com/product-detail/en/kemet/LDEIB2100KA0N00/399-12880-1-ND/5731504
- 10nF 250V Ceramic Capacitor (Cheaper, but will ceramic mess things up?): https://www.digikey.com/product-detail/en/kemet/C1206C103JARACTU/399-7174-1-ND/3439312
- 10uF Electrolytic Capacitor: https://www.digikey.com/product-detail/en/panasonic-electronic-components/EEE-1CA100SR/PCE3878CT-ND/766254
- Might as well throw in the resistor: https://www.digikey.com/product-detail/en/vishay-dale/CRCW08053R30FKEA/541-3-30CCCT-ND/1962168

Since I honestly don't know very much about what I'm doing here, it feels like I'm shooting in the dark. Would there happen to be a college-student-friendly way to tell whether this is pumping out EMI? Maybe loop some copper and hook it up to my scope? Maybe turn it on and off next to a radio?? I don't know 

[T3sl4co1l]

Here's the updated power supply schematic:

C4 is electrolytic.
Is there a particular reason why C17 should be a film capacitor? Limiting to SMD parts and having a minimum purchase quantity no greater than 1, I was able to find equivalent ceramic capacitors that are 10nF and can sustain 250V for significantly less money on digikey than film capacitors.
Like you said, the nice thing about this is if it doesn't work somehow, I can just depopulate the caps (and R27) and jump the inductors.

Would rather film over ceramic at high voltages, because e.g. X7R capacitance drops off quickly with voltage -- even well below the rating.  Higher density types (X5R, Y5V, Z5U..) are even worse.  Lower density types are better (C0G is pretty much the ideal capacitor), but bigger, and much more expensive.

If it has to be SMT, heh, SMT chip film caps aren't terribly cheap themselves, and it's worth shopping for a ceramic alternative...

If it matters, here are some digikey parts I found, I do not know if they have some fatal flaw I didn't notice:
- 1uH Inductor: https://www.digikey.com/product-detail/en/samsung-electro-mechanics/CIGT252010LM1R0MNE/1276-6939-1-ND/7041339
- 100uH Inductor: https://www.digikey.com/product-detail/en/tdk-corporation/MLZ2012N101LTD25/445-181376-1-ND/9740582

1uH is good.

100uH, notice it's self-resonant around 20MHz (p.5, L(F) plot is usually stopped just before it goes bonkers), which is kind of low, but it's probably still got a lot of impedance at that point (kohms) which will do.  Oh, there's also a full impedance plot (p.10), so why even bother with the L(F) plot heh... Doesn't show any high order resonances (which seems maybe a bit suspicious, really?), but if that's really the case, it looks like a simple capacitance at high frequency, nice and predictable.

But what's sneaky is p.7, notice L drops off substantially (say -30%) at only 20mA, yet it's rated for 140mA!  (The table shows it as 30mA at 50%.)

Good thing we don't need much current here, so this is fine!

- 10nF 250V Film Capacitor: https://www.digikey.com/product-detail/en/kemet/LDEIB2100KA0N00/399-12880-1-ND/5731504
- 10nF 250V Ceramic Capacitor (Cheaper, but will ceramic mess things up?): https://www.digikey.com/product-detail/en/kemet/C1206C103JARACTU/399-7174-1-ND/3439312

Yeah,  pricey film.  Also those are hard to solder; the plastic softens at soldering temperature, I'm not sure it's a good idea, or even reliably possible, to do by soldering iron...

Ah, the ceramic has a link to its ratings, follow the K-SIM link -- in the Plot box, select DC bias.  It's about -32% at 170V, which is fine -- we're just looking for a ballpark here.

Also, I don't quite trust their plots, because they use that stupid piecewise curve -- notice the kink at 150V.  Nothing actually does that, and no one else plots their parts like that.  Likely the kick overestimates the actual response; whether that's compensated for underestimates elsewhere or what, I don't know.

Knowing isn't a terribly precise thing anyway, as we're talking about a 5% capacitor, with 10% tempco over rated range, plus 30% C(V) drop over desired range.  Plus there's yet another, maybe 20% drop, after some years, due to aging.

But that's still something, even if it were 5nF in the end, it's still something we can work with.

- 10uF Electrolytic Capacitor: https://www.digikey.com/product-detail/en/panasonic-electronic-components/EEE-1CA100SR/PCE3878CT-ND/766254
- Might as well throw in the resistor: https://www.digikey.com/product-detail/en/vishay-dale/CRCW08053R30FKEA/541-3-30CCCT-ND/1962168

Since I honestly don't know very much about what I'm doing here, it feels like I'm shooting in the dark. Would there happen to be a college-student-friendly way to tell whether this is pumping out EMI? Maybe loop some copper and hook it up to my scope? Maybe turn it on and off next to a radio?? I don't know 

Those are fine.  I'd prefer a cap that specifies ESR or impedance, but it's probably in the right ballpark.  It's also only 2000 hour life at 85°C; it should still last a goodly number of years near room temperature (this thing isn't going to warm up much at all, I think?).

Yes, you can do near-field probing with just waving around a scope probe (it has a low capacitance and high impedance, so it picks up ambient AC fields), or a loop of one or a few turns.

EMI is looking for signals on the order of mV, so it can be hard to see on a scope with a fractional mV noise floor.  Switchers, and digital circuits, generate impulsive noise, so expect to trigger on a peak somewhere, and see if you can get a measure of that.

On the upside, if you aren't seeing more than say 10s of mV up close, it's very unlikely there's much at a distance.  The best part is, with only the one cable, you should have very little common mode noise -- that is, AC imposed between cables (and thus acting as an antenna).  That's the main way you run into emissions.

If you'd like to test for common mode (conducted) emissions, you may be able to do that with a USB cable still, actually.  You use a ISN (impedance stabilization network) to couple the noise from one side into a detector (scope or spec), and decouple it from external noise sources (e.g. power supply).  See attached.

Uh, to meet the inductance they specify, you'll need quite a few toroids of high permeability; but, even if you're using just say 100uH, it's enough to do the job just at high frequencies.  (You don't need the 150 ohm termination; going direct to the scope, set to 50 ohm input, will do for representative purposes.)

Now, you won't have screened connectors on a USB cable -- well, you will if you add bulkhead connectors and stuff, but there's an easier way.  Just strip back some of the outer jacket, exposing the shield; solder that to the network shield or signal line respectively, and you've got it.  (Solder it quickly so the insides don't melt and short out.  No need for a big joint, just a tack or two of solder will do.)  A fully enclosed metal box is preferable, but a flat sheet (pick up some bare copper clad? use copper foil tape plastered over cardboard?) will do in a pinch.

You probably won't see much here, but it may be interesting to see what other things do.  USB hubs, peripherals, even turn it around (flip the connections, or add connectors anyway so you can plug in a USB host or device at either end) and measure a PC or laptop!

Tim

[Mighty Burger]

Thank you. There are so many more pitfalls and traps than I was aware of.
It was really interesting reading through your response and seeing your thought process for all the components.

Lots of these effects I wasn't even aware of. Like inductor self-resonance. Though this one seems like it should be fundamental knowledge of inductors. Clearly I don't know my inductors 
And I had no idea ceramic capacitors lost capacitance as the voltage increases! And if I did I would've assumed it wouldn't drop off until the voltage exceeded the capacitor's rating. Also, that is some sneaky business with that inductor current rating..

From what it seems like, those components, while not optimal, will work alright.

Here is an updated board. I added the new components and moved the +170V nixie anode power supply all to one side. I feel a little better this way knowing I'm not relying on vias to power the nixies anymore. It does mean the board will have to rely on via stitching to the top plane a little more, but I think there's plenty enough stitching ..
Note after taking these screenshots I moved the electrolytic capacitor a little bit away from the HV converter, in case the converter generates some heat. I'm not in the modern smartphone business - I want to avoid planned obsolescence!
It was also at this point when I discovered KiCad had a high-contrast display mode to make routing easier. If only I had known about this sooner..

[Mighty Burger]

Alright, think I'll buy the board and the parts!
Quick question - I have lots of leftover 0603 parts, but I thought they were a pain in the butt to handsolder so the new design has 0805 parts. I don't want to waste those leftover parts, do you think I could use them on 0805 pads?

[T3sl4co1l]

Yeah, you can force them on.  Even if it's not on the pads, you may be able to hold it in place with tweezers and drag a glob of solder up to it.  I've done 0402 this way.

Tim

[Mighty Burger]

Great, thank you.
I'm almost thinking it might be easier to put 0603 chips on 0805 pads, with the larger pads to solder onto and everything.

[Mighty Burger]

Just realized I made a mistake - the switch I chose can only handle 200mA! Oops.
Hopefully I can find something with the same footprint that can handle the current, if not changing the footprint shouldn't be too bad.

[Mighty Burger]

I glanced at the datasheet for the crystal.
It says:
"Soldering the body of cylinder type crystal unit must be strictly avoided as it may cause significant deterioration in characteristics of the product. Rubber adhesive is recommended for mounting."
Here is the Digikey link:
https://www.digikey.com/product-detail/en/citizen-finedevice-co-ltd/CFS-20632768HZFB/300-8763-ND/2217074
I chose this crystal because of its +/- 5pmm accuracy. This is the same crystal I used in the first version and it worked fine.

Would it be better to just get rid of the exposed soldermask square and keep the ground plane underneath the metal body of the crystal?

[T3sl4co1l]

Ah, then better not to.  Can tie it in place with a jumper wire over the body, I've seen that.  Soldermask opening optional.

Tim

[Mighty Burger]

Sounds good. I'll throw down a couple through holes for that jumper wire.
Might as well expose the soldermask for the entire outline of the crystal, it'll only help connect it to ground.
If that doesn't turn out, like you said, I could always just swap out those caps to compensate for the added capacitance. I do have some lower capacitance 0603 chips laying around.

If shorting the crystal's casing to ground makes it stop working, electrical tape is cheap.

[Mighty Burger]

Final version! (I hope!)
Yes I know the date is slightly off. But freedom, you know..
And I couldn't resist the urge to put a little inside joke on the back of the board between me and some friends.

Also, for the power switch, I will be using a seperate, panel-mounted rocker switch, so I just added a couple holes to solder wires to in place of the switch.

[Mighty Burger]

Ordered the parts and the board. It'll take a while to arrive but I'll keep yall posted when bits arrive and things are built. Crossing my fingers!
Thank you guys for all of the help. Especially Tim, you've helped a ton throughout this project and taught me a lot, thank you!!

[Mighty Burger]

Parts arrived! Ok, to be honest they arrived on Friday, but I've been slacking a little. 
Anyways, it's time to move on to the physical construction, which I hope will be significantly easier than the electronics.

One question - how thick of wood do you think I should use? 1/4 inch thick, or 3/8 inch? I plan on using Oak.
Advantages of 1/4 inch:
- Seems like I can buy 1/4 inch thick wood boards that are surfaced on four sides from Home Depot, I can't do the same for 3/8 inch thick meaning I'd have to buy 1/2 inch boards and plane them down. So 1/4 inch would be faster and cheaper.
- Would be smaller and would look slightly nicer
- With either thickness I will need to elevate the nixie tubes slightly above the PCB using 3D printed plastic discs in addition to the plastic bits that comes with the tubes. With 1/4 inch thick Oak I'd only need inserts that are 1/8 of an inch tall. With 3/8 inch thick oak I'd need to use 1/4 inch thick plastic inserts, making the tubes mount uncomfortably high above the boards.

Advantages of 3/8 inch:
- Sturdier. Given the fact Oak is a hardwood, would 1/4 inch thick be too flimsy?
- Since the top board is thicker, I may be able to screw the PCB directly to the top board, rather than using standoffs connected to a plate of sheet metal on the bottom of the clock. Intuitively this seems like it would be a sturdier method of mounting the PCB.

Thoughts?

Thankfully, I might've found someone who could help me with making the brass rings. If you don't know what I'm talking about this is sorta what I'm going after:

[Mighty Burger]

Soldered everything up with the exception of the nixie tubes and the 170V power supply, I'll put those one once I have the case built.
Sadly I ran into a couple issues..
One issue is minor - I was going to tie down the crystal with a copper wire, but I was unable to get it held down tightly. I likely need to move the holes closer to the crystal. I'd rather not have intermittent problems when the crystal comes in and out of contact with the GND plane so I put some electrical tape under it and used an insulated wire to hold it down. The oscillator works, thankfully. Not sure if using 15pF capacitors rather than 22pF would be better to give me more margin, but it seems to work perfectly fine right now.

A slightly more significant issue - the 12 Hour mode does not work. The way it is supposed to work is, when it is in 12Hr mode, the hours counters go from 1 to 12. I am using AND gates to do the following:
When the digits are 1,3: reset the digits to 0,0;
When the digits are 0,0: set the digits to 0,1 by pulsing the clock pin of U5

So, when the clock hits 13 o'clock it sets itself to zero o'clock then immediately sets itself to 1 o'clock.

What happens in reality is, when it hits 13 o'clock, it gets set to zero o'clock and becomes stuck. The counter's clock pin is stuck high.

I have a vague idea of what is causing the issue. With these CD4000 counters, the reset pin can sometimes mess with the counter pin. If RESET is held high, pulsing the CLK pin will do nothing - it will stay set at 0.
If, and I think this is the relevant bit for this circuit, if first RESET is held high, then CLK goes high, then RESET goes low, the clock will still not count, no matter how long the CLK pin is held high. CLK has to go low then high again for the counter to increment.

So what I think is happening is, when it hits 13 o'clock, the RESET pin goes high and the clock goes to 00. Then the counter's clock pin goes high with the intention to make it increment by one, but the RESET pin is somehow still high at this point so nothing happens!!
I thought the RC network between R7 and C7 would create enough of a delay but alas.

I've tried lots of different shenanigans including increasing the value of R7 to 100k, to increase the time it takes before the CLK pin is pulsed, decreasing the values of R2 and R9 to 10k, and even using a BJT transistor to prevent the CLK pin from going high when the RESET pin is high, but somehow nothing seems to be working. I was wondering if you guys had any ideas.