Thank you. Yes, the circuit turned out to be simpler, since there’s no need to look for a separate JFET transistor. The signal linearity also turned out to be excellent.
Well. The circuit turned out to be good and stable; I like it.

I suggest we stick with it.
If no one objects, I would like to suggest discussing a slightly different issue. So as not to start a new, separate topic.
As I mentioned earlier, I’m developing a discrete transistor‑based controller for a class D amplifier. We already have a triangle generator. Now we need a comparator — in the same way, but using transistors.
Take a look at the diagram; I’ve sketched out a simple comparator circuit. The voltage source V3 will in reality be a sound source with an amplitude of up to 1V and a bias of +2.5V.
When there is no sound, the output of the comparator is a square wave with a duty cycle of 50%. When sound appears, the duty cycle of the square wave will decrease or increase in time with the sound. That is, a simple class‑D amplifier principle.
I have a question. When I increase the voltage at source V3 to 2.9V, the duty cycle of the square wave at the output is 10%. Everything is fine. But when I increase the voltage at source V3 to 2.95V, Multisim refuses to create a 5% duty cycle at the comparator’s output. Is this a fault in my comparator’s circuit? Is it too slow? Or is it a simulation error in the program? Can you check in other programs?
In reality, I would like the duty cycle to be modulated stably, at least from 2% to 98%, ideally from 1% to 99%.
p.s. R17 390Ω will actually limit the current through the optocoupler LED. Its value must not be changed. The square wave oscillograms are shown at the output of the comparator (collector Q18).