AC switching mos-fets

[Lusu]

Hi,


I'm studing a way to do trailing edge phase cutting for an AC dimmer (230V AC, absolute max. 5A load, not planned to be reached). I've found SI8751/2, see datasheet here: https://www.silabs.com/documents/public/data-sheets/Si8751-2.pdf

Particullay I'm looking at schematic from 3.2 (on page 6) and I need to find out suitable transistors for the requirements:
- must turn fully on at ~9V G-S (minimum gate output voltage of the chip)
- must handle 230V AC (well... 330V DC equivalent, so ideally >500V S-D for headroom as AC can go over 250V in normal operation)
- must handle minimum 5A without heatsink (will be inside the wall in a closed enclousure)
- must have as low as possible RDSon resistance
- THT desired, SMD will do

a) I am not familliar with such transistors, so any recommendation is appreciated.
b) I am unsure if the voltage divides between the two transistors or each of them should handle the full voltage.
c) What is the datasheet parameter that specifies the "full-on" gate voltage?


Thank you.

[Jeroen3]

a) You could see if ST's MDmesh M5 can fit your specs, they have very low Rdson. But I think the voltage it tricky. Maybe you'd need more near 800V fets.
You can also look at a triac solution. The only problem for a thyristor based solution is 1 Watt per Ampere.
Perhaps for fet the STW65N80K5. But it needs 12 Vgs. Then you lose 3.5 Watts on those with 5A.
Or the STY50N105DK5, that is open at 9V, but is €20 per part...

b) Both must take the full voltage. They never switch theoretically simultaneous.

c) A graph with Vgs/Ids at certain Vds usually tells you if you are in the saturation region with minimum Rdson.
See attached.

[Lusu]

Thanks for the info, I will check the recommended FETs.

I can't use triacs, because they do leading phase cutting, I want trailing edge. My circuit is already using a triac, but I want to change the solution to FETs. This will allow me to do whatever... leading edge, trailing edge, PWM (within limits)...

[Jeroen3]

TK31V60X is indeed a nice part.

[David Hess]

Practically any power MOSFET which meets the voltage and current requirements will work.  600 volt parts are very common for 240 volt AC applications.  I did a quick survey and plenty of TO-220 parts exceed your requirements by twice the current for less than $2.

c) What is the datasheet parameter that specifies the "full-on" gate voltage?

The full enhancement voltage is given as a parameter for specifications like on-resistance but 9 volts will fully enhance almost all power MOSFETs.  10 volts is common but some "logic level" parts will fully enhance with only 5 volts.

[langwadt]

b) Both must take the full voltage. They never switch theoretically simultaneous.

no switching required,  when are off they alternating see half a period of full voltage through the other fets body diode

[Lusu]

Thanks for the info, I'm learning a lot here...

Since I'm an not experienced with FETs (I worked with NPN and PNP a lot, not FETs), I've got a little confused by some specs.

V GS is like +/-20V in datasheets... that confused me a bit, but I guess it means the maximum voltage difference that can be applied to G-S, not the "full on" value (lowest RDSon). Thanks to Jeroen3, now I know what to look for in a datasheet. Also, I've read while studying the circuit I plan to do that there are power FETs that turn fully on at over 12V, which is higher than 10V tipical output of the IC in question... ==> higher RDSon ==> higher heat output.

I've also saw a "max power" of 4-500W while "max I D-S" was like >40A... 600V * 40A = 24KW!? What does this means... does it go up to 24KW (with proper heatsink) or it is capped at 500W? E.g. from the datasheet of STW65N80K5, linked here:
VDS: 800 V
RDS(on): 0.08 Ω
max. ID: 46 A
PTOT: 446  W
and later in the datasheet: PTOT == "Total dissipation at Tcase = 25 °C" which implies that this is the heat optput at max. load, not the supported power. Does it handle 36.800W (800*46)?

The ideea is to oversize the FETs for the requirements, so they will work as cool as possible, without any heatsink, beeing enclosed in a small plastic box inside a brick wall... I will not draw 1.100W in any normal use case, I just provision the PCB and components for that. (1100W is 11 * 100W classic light bulbs, and I plan to go for hallogen or even dimmable LEDs, if I find good ones -- different story). I do have a working version with triac, but that's not ideal for what I plan to use.

I know that LEDs will take a lot less, arround 15W for 1000...1500 lumens, so 1.100W is overkill, but dimmable ones are expensive and hard to find (today, at my location at least), so probably I'll go for hallogen ones (easier to find, but they take 75W at same output) and worst case I'll kill the planet with classical 100W bulbs...

Also, I have to be carefull with blowed bulbs, the breaker trips when one burns out, and I do not want to fry the components if that happens... the breaker should have enugh time to trip before the power FETs will give up or heat up too much to cause trouble (like a fire... a damaged PCB or component can be replaced but not the whole house).

Therefore, I hope I'm not wrong when I assume the following:
- the PCB traces should handle over 5A (1100W)
- the power stage should handle >450V and >10A before needing a heatsink
given that:
- input AC is 230V nominal and can go over 250V in normal use (+/- 10%)
- the planned max. load is 1000W (10*100W incandescent bulbs), probably 750W (10*75W hallogen bulbs), ideal <200W (10*15..20W LED bulbs)
- the minimum load can be as low as 1 LED bulb (<20W at full ON; triacs can/will missfire at this low load)
- the actual load will vary between 1 bulb and 10 bulbs, depending on install location

[Jeroen3]

There is another graph in the datasheet about the maximum load on the mosfet. (not the load of you circuit)
See attached. From: https://e2e.ti.com/blogs_/b/powerhouse/archive/2015/05/02/understanding-mosfet-data-sheets-part-2-safe-operating-area-soa-graph
I specifies maximum Vds and Ids with time limits. Due to thermal capacities it is possible to have a short bursts <1ms of high currents.

- the PCB traces should handle over 5A (1100W)

They should not catch fire until the first fuse opens.

- input AC is 230V nominal and can go over 250V in normal use (+/- 10%)

Mains is also full of short transients and long dips/swells that need to be taken into the design. EFT is a fun one.

- the planned max. load is 1000W (10*100W incandescent bulbs), probably 750W (10*75W hallogen bulbs), ideal <200W (10*15..20W LED bulbs)

You may want to look into a snubber circuit if you actually intend to use dimming on those.

[filssavi]

One thing to be aware of is that you will be able to dim only half of the period, depending on how phase and neutral are wired, as the other will go through the diode, if you want to be able to do both you need to use two mosfet back to back in order to block in both directions.

Also be very careful with the Vgs, since it the mosfet is not fully enhanced you might run out of SOA

[Lusu]

The PCB traces are calculated to handle the load and I use them in pairs (one on top and one on bottom layer) to double/split the current between points on the PCB. I use 2x1.6mm traces, 3.32A each @1oz/ft2 for a total of 6.64A (10 deg C temp raise), over the 5A required. This will handle over 12A at 50 deg C temp raise, but this will trip the breaker, I guess that this will be plenty.

Transients... yes, they might be a problem, but I plan to add a full-house voltage regullator or even an UPS (if budget will allow), so that should be handled. I'll study in deepth the linked document anyway, I will learn new things. Also, I plan to have over/under voltage breakers, those should add little protection too.

A snubber should not be required, but I'll look into this and how can be achieved with FETs.


@filsavi if you look at the circuit, there are 2 back-to-back FETs in the circuit, so both halfs of the period are handled properly. Please see the link in the original post, there is the schematic in question.

[Lusu]

BTW... the chip has Miller clamps built in... isn't that what a snubbler does anyway?

From datasheet, 2.6.1  Miller Clamp Description:

"The Si875x devices provide a clamping device to prevent unintended turn on of the external FET when a high dV/dt is present on the FET’s drain. To use this feature, a capacitor is connected between the drain(s) of the FET(s) and one of the MCAPx inputs. A sudden, positive slope on this pin will cause the clamp device within the Si875x to activate and provide a low impedance path between the gate and source pins. This will prevent the FET from being unintentionally turned on.
The Si875x device provides two miller clamp input pins. This allows for both FET’s to be protected from unintended turn on when the device is used in an AC switch configuration. In this case each drain is connected to an MCAPx input through a capacitor.
Connection to a MCAPx pin, and use of the Miller Clamp feature, is optional. The device will function as expected if these pins are left unconnected."

I guess that for LED bulbs I need the snubbler, because classic (and halogen I belive) are resistive.

[Jeroen3]

The snubber takes care of the voltage transient that occurs when you turn something off. It has not much to do with the gate directly.
It just prevents Vds going over maximum rating due to inductive loads.