Help - How do synchronous boost converters behave at VIn = VOut-ε? e.g. TPS61023

[Arte]

Hello, I'm wondering how synchronous boost converters behave when VIn is near VOut.
Specifically I'm looking at the TPS61023 (https://www.ti.com/product/TPS61023), whose datasheet (https://www.ti.com/lit/ds/symlink/tps61023.pdf?ts=1782031580107) touches upon but does not, imo, make clear what the behavior is.

For context, synchronous boost converters have minimum on/off-time for their switches, here they're 8% of the default switching period, which means, if Vin = 96% of Vout, we're supposed to have a 4% duty cycle - that's not possible without tricks. The datasheet does allude to tricks e.g. frequency dropping when VIn nears VOut, but the provided graph cuts off at 4.5V, and not in a way that lines up with the duty cycle. It also states it has a passthrough mode with hysteresis at Vout >= 97|101% of Vin. It also mentions a PFL mode, but that seems to be about load, not voltage.

So what I'm wondering is: which is it, could I ever end up in a case where the boost is going to be limited by its minimum duty cycle, bring VOut too high, until it reaches 101% of VIn, which triggers passthrough, which slowly brings it back to 97% as the capacitor discharges, and then it starts switching again and we have an absolutely horrible loop of 200mV range of output voltages that destroys EMC and disturbs other components, or are we going to get a well behaved behavior where the IC is made in such a way it just neatly skips pulses, thereby lowering its duty cycle as low as needed? I keep reading the datasheet, and can't find the answer.

For the record, I've also tried the __Spices in KiCad, but the provided TI Spice model doesn't work there (per their support board) and only allegedly works on 'PSpice for TI', I've also tried that and can't log into it...
I've also tried their online simulator, WEBench, and get results I can't explain and distrust (see below - what do these frequency numbers mean?)

I would really appreciate guidance from better EEs. I'm probably going to order a tiny isolated board alongside my next proto order so I can study the behavior on an oscillo but being confident in the behavior before ordering protos with it would be great. Thanks.



--- WEBench simulation results @ 500mA load, 5V output ---



4.7V
Duty cycle = 6.62%
Frequency = [not applicable]
Mode = PFL (aka pulse frequency modulation) (But why? The datasheet only mentions using PFL for low loads. 500mA isn't a low load at all! And now the ripple would reportedly be massive?)
Efficiency = 97.8%
VOut ripple = 93.26mV

4.8V
Duty cycle = 5.15%
Frequency = 770.1kHz
Mode = continuous conduction mode (aka PWM)
Efficiency = 98.1%
VOut ripple = 11.17mV

4.9V
Duty cycle = 3.12%
Frequency = 758.89kHz
Mode = same, PWM
Efficiency = 98.2%
VOut ripple = 7.7mV



--- Greater XY context ---

 I'm migrating from making hobby boards to making boards that pass CE/FCC certs. I am dealing with designing a board that has a 3.3V input (custom cable), a 5V input (usually USB) and a 5V output (USB). Also, due to special circumstances the 5V from the upstream USB may be shitty e.g. be actually a 4.5V. I would rather it works anyway in this case, and not send <4.75V as that'd be out of specs. Meaning, solutions based on a transistor to bypass the problem are meh.

This is also a consumer electronics, low price board, so significant $ on just the power circuit is a bother, but also, since in one use case, this is USB powered and intends to power another USB (and some own circuitry), not burning >10% of the alloted power is highly desirable (given in theory, we can take no power for ourselves at all without breaking USB rules)

Currently, I'm looking at an overall circuit of both the maybe-3.3V and maybe-5V > ideal diodes (or load switches with ideal diode properties) > 'VMax' > boost > reliable 5V > downstream USB.

This means in some cases we'd be feeding a 4.6~5V input to a boost converter that we have output 5V, hence my worries about whether noise/EMC horrors happen in that case, and if there's no way around a buck boost (and asynchronous buck boost are lossy, and synchronous buck boosts are costly - NB: for instance the cheapest suitable part, TPS63100, is from TI, 30c on JLC, was 25c 2 weeks ago, and $1.15 in bulk on mouser! So very much a, could disappear from JLC any day situation in my eyes. Though TPS61023 is $0.6 on mouser, not much better in terms of 'real price'... There a lot more synchronous boost converters alternatives than synchronous buck boosts though!).

[Benta]

Quite frankly, I see this as a bit of a dead end. You're working on very small percentages with a potentially "dirty" input,

My suggestion would be to look at SEPIC converters instead. Yes, they need two inductors, but with clever design those can be configured as dual coils on a single core.
And the SEPIC is very nice from an EMC point of view: one inductor is serially on the input, which prevents a lot of noise. And taming the output EMC is easy.

Check it out.   

[Arte]

Thanks, I've been looking into them, not sure I fully get it though. So they're a form of buck-boost converters (as far as the contract goes) that are internally a boost followed by an inverted buck-boost, and use an inductor on the input? Well I've already found several components marked SEPIC but not buck boost that when looking deeper in the datasheet, turn out to support buck-boosting that way. That said, at a glance, not finding happiness in terms of voltage range x price x efficiency so easily!

And some of these efficiency numbers are terrifying! <70% for 5V to 5V?!? https://www.xlsemi.com/datasheet/XL6109-EN.pdf


Just to be clear, the conversions considered here are 3.3V->5V and almost 5V/5V -> 5V.

I'm thinking of doing a horrible hack where if the input voltage is say, >4.7V, I lie to the boost converters that we actually want e.g. 4.4V, by connecting a 3rd resistor from the feedback pin to a MCU pin, to force it in passthrough mode...

[Konkedout]

Keep in mind that the "synchronous rectifier" in the output is capable of conducting current in both directions.  I have not studied how this particular TI device works, but in general a synchronous boost could increase duty cycle to stay above minimum, and transfer current first in one direction and then the other during each cycle.  That would be "forced PWM" mode in many switchers.

Alternatively it could start skipping pulses.  That is likely to be more efficient but also would make the output ripple more noisy.

[Benta]

https://en.wikipedia.org/wiki/Single-ended_primary-inductor_converter

There's no reason for the SEPIC to have such a low efficiency, that seems to be a problem with the XL6109 (which is probably not designed for the job).
This note shows 90%:
https://www.ti.com/lit/an/slva337/slva337.pdf

The point is that it can produce an output voltage independent of the input voltage and that it is exceptionally attractive from an EMI point of view.