How to analyze the opamp circuit

[Vihaan]

How do i analyze the below circuit? What is the starting point?

[Konkedout]

Houston we've had a problem.

The op amp has no negative supply!

[Vihaan]

This is a text book problem and it does not mention the positive and negative supply.

[ledtester]

Look up: opamp single supply biasing

A web search says the image comes from James Fiore's "Operation Amplifiers and Linear Integrated Circuits", page 153:

https://www2.mvcc.edu/users/faculty/jfiore/OpAmps/OperationalAmplifiersAndLinearICs_3E.pdf

Here is his video on single supply biasing:

[Andy Chee]

Houston we've had a problem.

The op amp has no negative supply!

For the purposes of this exercise, calculation of input impedance, and calculation of Av, probably does not require the presence of a correctly connected power supply.  Follow up questions 41 & 42 may require correct connections, who knows.

[MrAl]

How do i analyze the below circuit? What is the starting point?

Hi,

It takes a little experience to understand this circuit because here are some shortcuts that you can take that eliminates some of the components and that makes the approximation easy.  I'll run it by you and then supply some more details for an exact analysis.

First, this circuit does not need a negative supply to work, so I don't know why so many would be mentioning that.  It's already biased to one-half of the positive supply, which also makes the output biased to about 1/2 of the power supply voltage also.  That means if you have a supply of 10 volts then the output is at roughly 5v.
This works because of the two 220k Ohm resistors, which creates a voltage divider putting the junction (and voltage across the 0.5uf cap) at 1/2 of the supply voltage.  With that we see 5v across the 0.5uf cap (10v power supply again).  Since the 100k sees infinite impedance on the right for DC, that puts 5v at the noninverting input of the opamp also.  The left side of the 30k resistor also sees infinite impedance because the input to the opamp is infinite and the 1uf cap has infinite impedance for DC.  That means for DC, the 30k resistor makes the circuit look like a gain of 1 non inverting opamp circuit, which is where we get 5v at the output.  Be aware again this is for DC which is for determining the bias voltages and/or currents.  The AC operation will be different because the capacitors are not open circuits for AC only for DC.
Ok so we have established the DC operating point which for a +10v power supply means 5v at the noninverting input and 5v at the output, and the 30k is the only feedback for now so we have a gain of +1 circuit which is where we get the 5v at the output.

Now for the AC analysis.
For this the caps become non-zero impedances and this means there could be a small effect or a large effect, and for this circiut for most frequencies there will be a large effect, but only on the AC output result not the DC.
The input comes in through the 0.1uf cap which works with the 100k resistor, and that creates a voltage divider with the voltage across the 0.5uf cap.  Since the input DC is biased at 1/2 of the supply voltage Vcc, the AC voltage will cause some AC voltage to ride on the 5v DC bias, which means the opamp effectly sees the AC voltage alone, and for a first approximation we consider the 0.5uf cap to be large enough so that the DC voltage across it does not change much, and this is reasonable for now.
Since the 0.1uf impedance will be fairly low compared to the 100k resistor for most AC frequencies, we can approximate the input at the noninverting input to be EQUAL to the input voltage itself.
Now before we saw the 1uf cap be open circuit for DC, but now we have AC so we have to consider it as having a significant effect.  Since the 1uf and 2k shunt some of the current away from the inverting input, that means the gain will change.  Before we had a gain of 1, now we have to change that because of the voltage divider effect of the 30k and the 2k in series with the 1uf cap.
The voltage divider effect has to take into account the impedance of the 1uf cap, there's no way around that except at very low frequencies.  The impedance of the 1uf cap is:
Z=1/(2*pi*f*C)
and with C=1e-6 that makes the impedance:
Z=1/(2*pi*1e6*f)
which is about:
Z=1/(6.3e6*f)=f*1.6e-7
The series string with the 2k resistor makes that string:
Zs=Z+2000
This comes out to about :
Zs=2000.0-(159154.9430918953*i)/f
This will be close to 2000 for frequencies around 1kHz and above, so let's use that as a starting approximation.
Combined with the 30k resistor, the voltage divider effect is 1/16, so we get one-sixteenth of the output voltage at the inverting input.  This means the output will be 16 times greater than the voltage at the inverting input, which means the AC again will be much higher than the DC gain.
Since this is a noninverting op amp circuit now, the gain is:
G=1+Ginv
where Ginv is the inverting opamp gain.  Since Ginv=15 that puts the AC again at 16.
This of course means that if we input 0.1vac we will get about 1.6vac output at frequencies around 1kHz or above, up to the frequency where the opamp does not function well.

So that's the short cut approximation just so you can get an idea how this works without going too deep in the math yet.
If you want a full analysis, then you have to go to describing all the capacitors as complex impedances, combine those with the resistances, and then calculate the output.  This analysis will allow calculating a result with frequencies lower than 1kHz as well as others.
I can show you how to do this if you would like to see how it is done.  It is more complicated, but if you understand complex numbers it is basically easy.

Just to add a little here, opamps are not perfect devices so sometimes we have to take into account other parameters such as open loop frequency response and slew rate.  For the analysis above we assume the opamp can follow any input perfectly, but if you need a higher frequency response then you have to go to a better opamp then a cheaper general purpose opamp.  You can find details about this on the web.

[EEVblog]

How do i analyze the below circuit? What is the starting point?

Because it says impedance, that means AC resistance. And because the frequency isn't specified, step 1 is to assume all capacitors are a short circuit.

Step 2 is to now work out the input impedance. All caps are a short circuit so the input current has nowhere to go but into the 100k resistor. No current flows into an opamp input.
Power supplies are a short circuit for AC, so the two 220k resistors are in parallel, but that doesn't matter because they are also in parallel with the 0.5uF cap which is a short circuit.
Therefore the input impedance is just the 100k resistor.

The gain Av is just the standard unity gain formula of 30k/2k + 1 = 16 because the 1uF cap is also short circuit. Av in this case mean "AC gain".

[EEVblog]

Now for the AC analysis.
For this the caps become non-zero impedances and this means there could be a small effect or a large effect, and for this circiut for most frequencies there will be a large effect, but only on the AC output result not the DC.

I doubt an exam question like this is asking for such detail given that it doesn't specify any frequency at all. So the answer they want is to assume the caps are just a short circuit.
If they wanted a detailed frequency analysis answer the question would have been worded in more detail.

[MrAl]

Now for the AC analysis.
For this the caps become non-zero impedances and this means there could be a small effect or a large effect, and for this circiut for most frequencies there will be a large effect, but only on the AC output result not the DC.

I doubt an exam question like this is asking for such detail given that it doesn't specify any frequency at all. So the answer they want is to assume the caps are just a short circuit.
If they wanted a detailed frequency analysis answer the question would have been worded in more detail.

Hi,

Sure, and they probably don't even care about the DC biasing

[EEVblog]

Sure, and they probably don't even care about the DC biasing

I'm sure they don't!
Especially given that it's exam question #40, you are expected to just rip through these things with a minimal of explanation. No extra marks to be had for being smart and giving multiple answers based on frequency analysis.

[EEVblog]

I just shot a whole video answering this question, coming tomorrow.

[gbaddeley]

Houston we've had a problem.
The op amp has no negative supply!

One could assume that in this case the opamp -V is connected to ground. Otherwise the circuit would not work if constructed or simulated. A ‘typo’ error  you might say, that doesn’t affect the intent of the exam question.

[MrAl]

Sure, and they probably don't even care about the DC biasing

I'm sure they don't!
Especially given that it's exam question #40, you are expected to just rip through these things with a minimal of explanation. No extra marks to be had for being smart and giving multiple answers based on frequency analysis.

Hello again,

Oh I didn't think that was too complicated.  For example, the input impedance made me think of 'impedance' rather than just 'resistance', and for one single result that's just a tiny bit more complicated:
Zin=100000.0-(1591549*j)/f
or using kilohm and megohm notation:
100k-(j 1.6M)/f
if I did that right.

I guess I am so used to using math software now everything seems easy

[EEVblog]

Houston we've had a problem.
The op amp has no negative supply!

One could assume that in this case the opamp -V is connected to ground. Otherwise the circuit would not work if constructed or simulated. A ‘typo’ error  you might say, that doesn’t affect the intent of the exam question.

It could also deliberately have things missing like the ground and the V+ symbol to test whether or not you can ignore the things that don't matter to answering the question. In which case it's a rather clever question, adding in the bias, PS ripple filter and output filter to see how you handle that extra stuff.

[EEVblog]

Here you go:

[PCB.Wiz]

How do i analyze the below circuit? What is the starting point?

Another poorly done homework question.
At 1Hz the input impedance is above 1.5Meg, as Fin increases it drops and asymptotes toward 100k, from above.
Even at 20kHz it will be measurably slightly above 100k, and the gain will likewise asymptote toward 16.00 from below.

[Sensorcat]

With a few years experience in academic teaching and also grading exams, I see this as an ill-posed problem. It is productive to make students think about what matters for a solution and what doesn't, and why. It is unproductive, however, to make students guess what the professor meant when the problem as such does not lead to a clear conclusion whether or not shortcuts are allowed or necessary. Also, the way problems are given should follow common standards, in order to strengthen the standards that help engineers understand each other.

Specifically:

An opamp should have either two power supply terminals, or none, but not one. Two, if the supply matters to the purpose of the schematic, e.g. product documentation. None, if it doesn't, because the purpose allows abstracting from the supply. There's no such thing as half-abstracting something away. One supply terminal is not consistent. One could argue that students should be able to read it anyway. Yes, but presenting it in teaching only means that this half-baked style is passed to them as good example. But the teacher has to decide: Do I want them to learn that both none and two supply terminals are OK, with application in mind, or do I want to create a mess? Presenting too many confusing items at once means the latter, and nothing achieved.

Regarding the impedance, an exam will always have a reference solution, and if the student delivers less than that, points will be lost (or time, if the problem is for self-study). So, if you are clever and say, easy, it's AC, unspecified frequency, so capacitors are shorts, 100kΩ, while the professor meant: Unspecified frequency => give the impedance for any frequency - bad luck. A complaint about the result will only be successful if the problem had an error, not if the problem was ambiguous and you used the cheapest exit. It's a big, avoidable disappointment for a student who knows the solution, takes the short-cut and reads, when the reference solution is published (or simply after turning the page in self-study):

Zi = .1µF + 100kΩ + (.5µF || 220kΩ || 220kΩ) (actual calculation left out not to bore anyone)

All because the professor was too lazy to write: "What is the input impedance Zi over frequency?".

Been there, done that, on both sides of the counter. Such a waste, and no improvement, nowhere, since I started observing this lazyness in the early 1990s.

[EEVblog]

For those wondering, someone on Youtube pointed out this is actually a question from a textbook, page 153:
https://oer.uinsyahada.ac.id/files/original/0a238113fbb49ab2ffe862e61cd5995e.pdf

There is no answer in the back Answers sections, so I'm not sure what's going on there.

[EEVblog]

Part 2:

[tszaboo]

How do i analyze the below circuit? What is the starting point?

Because it says impedance, that means AC resistance. And because the frequency isn't specified, step 1 is to assume all capacitors are a short circuit.

Step 2 is to now work out the input impedance. All caps are a short circuit so the input current has nowhere to go but into the 100k resistor. No current flows into an opamp input.
Power supplies are a short circuit for AC, so the two 220k resistors are in parallel, but that doesn't matter because they are also in parallel with the 0.5uF cap which is a short circuit.
Therefore the input impedance is just the 100k resistor.

The gain Av is just the standard unity gain formula of 30k/2k + 1 = 16 because the 1uF cap is also short circuit. Av in this case mean "AC gain".

I mean, you can even say:
Av =~ 15.5
or Av=26dB
or "Av is the gain of a circuit"
or Av = 0 because you didn't power the circuit.
I would give extra points to the most sloppy right answer, if I would be the grading teacher.

[SiliconWizard]

To figure out to what extent one should answer that, we need more context (what were the previous questions, which may be an indication of what's expected), the average time per question, and the contents of the relevant courses (exam questions being often linked to courses and so may make some assumptions that are not immediately obvious for people who haven't attended that particular course).

First thing to note is that the circuit is built around an opamp that forms a non-inverting amplifier, with a single supply topology, hence the biasing network (the two 220k resistors + the 0.5 µF cap) and the series capacitor in the feedback loop.

For Av, if we don't need to give an exact value vs frequency, we can indeed just answer that Av < (1+30/2) => Av < 16 and say that it forms a high-pass filter with Av's asymptote being 16. IMO, not even mentioning (even if not quantifying) the effect of the frequency would be a mistake.
(If you just calculate the frequency past which the impedance of the capacitor is negligible - say the 1% point - it gives about 8 kHz. That would be an extra point without having to give the full complex expression of the gain.)
Likewise, you can quickly mention that at DC, the gain for the opamp is 1, but the overall gain of the circuit is 0 as the input (and output) section forms a high-pass filter.

Ditto IMO for input impedance, you can say that ||Zin|| > 100k and that the input section forms a high-pass filter. At DC, it has "infinite" input impedance (modulo leakage in the series capacitor).

Finally, not asked, but if you consider the output stage, you can mention it forms a high-pass filter, and if we assume the opamp is ideal (zero output impedance), then you can give the cutoff frequency (-3 dB) of the output stage, 1/(2*pi*R*C)  ~ 66 Hz and note that it will predominate over the cutoff frequency of the input stage (due to the R*C factor being significantly smaller), so you can say that the overall circuit (with ideal components) is a high-pass filter with > 66 Hz cutoff frequency and a maximum gain of 16. (With real components, it will of course have a bandpass behavior, with attenuation past a certain frequency.)

[MrAl]

Hello again,

Here is a little more information about this circuit inspired by Dave's informative videos.

There are several attachments refer to them by page numbers 3 to 6.

PAGE 3:
Circuit drawn more complete with component labels and grounds and Vcc.  Also showing R9, which would
be the output resistance of the preceding circuit.  We often take this to be 0 Ohms for simplicity
but if the preceding circuit has significant output resistance this can change the output voltage
significantly as well.

PAGE 4:
The simplification offered by Dave, showing just how simple this circuit can be when we use the high
frequency assumption.  It's ultra simple to analyze now, and gives us a quick idea about how the basic
circuit works.

PAGE 5:
The same circuit as PAGE 4, but replacing the OpAmp with a Voltage Controlled Voltage Source, which
is what we actually do when we assume the OpAmp is ideal, and we set the gain to +infinity which makes
the analysis cleaner.  If you don't like setting A=+infinity, then just set it to 100000 or something.
When we do the analysis, we actually take the limit of the response as A tends toward positive infinity.

PAGE 6:
This shows the circuit with the OpAmp as a VCVS again, and since that gives us output VoutB which has
no frequency response, addin the circuit with R7 and C5, we get a first order frequency response which
is VERY close to the actual freqency response of the circuit without the added C4 and R6 from the
original circuit.  This can give us a quick idea what happens when the frequency goes below about 1kHz.
The amplifier on the output of that little network has a gain of 1 just so that R6 and C4 do not load
the little R7 C5 network if it is used.  VoutC is the output, but adding the original network C4 and R6
then VoutD is the actual output of the entire network.  That should be very close to the original
circuit output because the first order high pass filter C5 R7 mimics the original frequency response
fairly well. Using a higher order to lower order filter transformation method to specify the values,
it's not exact but it's very close.  The method is to simply match the -3db cutoff frequencies of
the entire original networks and the substitute network.
The effect of the last network made of C4 and R6 is to more or less cause a frequency shift in the
response.  The frequency required to get a response similar to its input will be slightly higher.

If you see any errors please let me know.

[free_electron]

there is a newer version of the book (october 2024 )  : https://dissidents.com/resources/OperationalAmplifiersAndLinearICs_3E.pdf

That being said : the first video explains the principle. The frequency behavior details ? shove it in spice (there's many . QUCS, Qsim , LTspice , Tina or even Microcap). Those things have been around for decades now. It's time to start using them.

A since it is 2026 : shove it in Claude:
"Take a look at the circuit in the image. Tell me what is the input impedance for DC and make an impedance plot for an AC sweep from 1hz to 1MHz with a driving amplitude of 1 volt. Assume the power rail is at 30 volts.
Then make me a gain / phase plot for the same input but from DC to 1MHz. Assume the opamp has infinite bandwidth and no input bias current"

Tt took less time that if i had to redraw it in a simulator , then set up the simulator and run it.

[free_electron]

And here is Claude's reasoning :

How I read Figure 4.44

Code: [Select]

Vin --| 0.1µF |--+---------------> (+) in
                 |
              [100k]                        (-) in --[30k]-- Vout
                 |                          (-) in --[2k]--| 1µF |-- GND
        node B --+--[220k]-- +30V
                 +--[220k]-- GND            Vout --| 0.2µF |--[12k]-- GND
                 +--| 0.5µF |-- GND

Single-supply non-inverting amp: 220k/220k divides the 30 V rail to 15 V, the 0.5 µF bypasses that divider to AC ground, and the 100 k isolates it from the (+) pin so the bias network doesn't have to be the signal impedance. Signal enters at the (+) pin through the 0.1 µF.

One judgment call: the 220 k drawn over the top of the amp. I took its far end as the +30 V rail and its near end as node B. That's the only reading where every part earns its place — mid-rail bias, fully bypassed divider. If it instead lands on the signal side of the 100 k, bias becomes 17.8 V and the Zin plateau becomes 220k‖100k = 68.75 kΩ; say so and I'll rerun.

Input impedance

At DC: infinite. The 0.1 µF coupling cap is an open circuit, so the source sees no DC load at all. (Probing past the cap at the (+) pin, the DC resistance is 100k + 220k‖220k = 210 kΩ, returning to a 15 V Thévenin source — but that's not what a generator at the input terminal sees.)

Across the sweep, Zin = 1/jωC1 + 100k + (110k ‖ 1/jωC2)


It's capacitive at the bottom end and settles onto a purely resistive 100 kΩ above a few hundred Hz — the textbook answer is the 100 k isolation resistor, and the plot shows how far down it holds.

Gain and phase

A_v = 1 + 30k/(2k + 1/jωC3), so 1× at DC and 16× (+24.08 dB) in the midband, flat to 1 MHz with the infinite-bandwidth assumption. Corners stacking up:

2.89 Hz — divider bypass (0.5 µF, 110 k)
4.97 Hz / 79.6 Hz — gain zero/pole from the 1 µF with 32 k / 2 k
15.9 Hz — input high-pass (0.1 µF, 100 k)
66.3 Hz — output high-pass (0.2 µF, 12 k)

At the load the gain is 0 at DC (both coupling caps block), −54 dB at 1 Hz, and within 0.2 dB of +24.08 dB by 1 kHz. Phase runs from about +173° at 1 Hz, peaks near +183° around 8 Hz, and is through 0° by 10 kHz. At the op-amp output pin (orange) DC gain is 1, not 0 — the 12 k sees nothing at DC but the pin sits at 15 V.

One thing worth flagging

At 1 V peak drive the midband output wants 16 V peak riding on the 15 V bias — i.e. −1 V to +31 V against 0/30 V rails. The output clips above roughly 500 Hz. Max undistorted input is about 0.94 V peak, and less than that with a real op-amp that can't reach its rails. The plots are a linear AC analysis (what SPICE .AC gives you), so they're valid for the impedance curve — the input network has no path back from the output — but the 24 dB plateau isn't reachable at 1 V drive in hardware.

You get full details, how it works, and where the stinkers are.
Claude set up a mathematical simulation using pyhon and numpy and ran the simulation on my computer, collected the data and rendered SVG files in a webpage.

The big thing is  : it doesn't just give you an answer , it walks you through it and explains what is going on , including the issues , so you actually learn something !

[armandine2]

..an earlier example of the question, in an exam, which I actually sat 

The Associated Examination Board
General Certificate of Education - Advanced Level
June Examination , 1988
ELECTRONIC SYSTEMS
Paper 2