How to reshape this signal into a square wave.

[Benta]

@PCB.Wiz:
Now you have a circuit running, why don't you reduce it to my suggestion (reply #22) and try simulating that?

Cheers.

[richardax]

Does the initial state need to be defined, or is this just a continuous signal?
If continous, just a comparator or op. Resistor divider to -, 10k to gnd and 20k to 5v to create a 1.5v ref. Signal through 10k +, and a 50k from out to +.
Adjust the resistor values if needed.

[PCB.Wiz]

@PCB.Wiz:
Now you have a circuit running, why don't you reduce it to my suggestion (reply #22) and try simulating that?

I do not see a ckt in #22, just a link to a complicated MAX1473 ?

[Andy Chee]

The blue waveform reminds me of the raw signal from the sensor inside a car engine's ignition distributor rotor cap which uses reluctor based trigger.

[Benta]

@PCB.Wiz:
Now you have a circuit running, why don't you reduce it to my suggestion (reply #22) and try simulating that?

I do not see a ckt in #22, just a link to a complicated MAX1473 ?

Under the link there's a reference to Fig.4. Easy to miss, sorry.

[PCB.Wiz]

Under the link there's a reference to Fig.4. Easy to miss, sorry.

Fig 4 is not very practical here, it would work with a differential stage with internal large hyst that was common mode tolerant.
With a generic comparator, the hyst is externally defined and not common mode tolerant, which is why I AC coupled into Amp-, so the DC base shift is removed.
Net effect is similar to fig 4 HPF.

[David Hess]

Maybe two comparators for creating a set and reset signal for a flip-flop?

That is what I would do.  Instead of a flip-flop, a bistable latch can be made with a pair of NAND or NOR gates, leaving 2 gates for other things.

[Benta]

Under the link there's a reference to Fig.4. Easy to miss, sorry.

Fig 4 is not very practical here, it would work with a differential stage with internal large hyst that was common mode tolerant.
With a generic comparator, the hyst is externally defined and not common mode tolerant, which is why I AC coupled into Amp-, so the DC base shift is removed.
Net effect is similar to fig 4 HPF.

Yes, which is why I mentioned three resistors. A positive feedback resistor needs to be added to set the hysteresis.

[Chris Mr]

Looks like you could just use a Schmitt trigger inverter (CD40106).

They have input triggers at 3.5v for 5v (so you might need a lower voltage like 3.3) and 0.9v for the low side.  In-between it wont change.

40106 is an inverter so use two stages to keep it the right way up.

[Benta]

OK, seems no one really knows what a "data slicer" is. It's goes back to the days of early electronics (you know, valves/tubes etc.) and is simple and effective.

I attach the circuit here together with a simulation plot.
The plot shows:
Blue: input pulses (Sig).
Red: digital output (out)
Green: +input to U1
Purple: -input to U1

As I said earlier: a comparator, three resistors and a capacitor will do the job.

I could not replicate the OP's original signal 100%, but that shouldn't make a big difference.

Cheers.

[Peabody]

Just so I'll know for future reference, why wouldn't a 74HC non-inverting buffer with a schmidt trigger input work for this?  If there is one.  Or possibly the SN74LVC1G17 I posted about before.
maybe with an added feedback resistor.

[PCB.Wiz]

Just so I'll know for future reference, why wouldn't a 74HC non-inverting buffer with a schmidt trigger input work for this?  If there is one.  Or possibly the SN74LVC1G17 I posted about before.
maybe with an added feedback resistor.

It can, but the original signal is DC offset from the average of the schmidt trigger points of a HC gate,
You can modify the trigger points with more resistors, but it still has poor tolerance to DC shifts of the input signal, and the hyst specs of a HC gate are quite wide. They are not precision parts.
A HC gate also draws significant current when biased near the mid point like that.

The data slicer in #34 also shifts trigger points with a DC movement in Sig, they are only balanced when Sig is 50% of Vcc.
The AC coupling of #24 does gives exact and symmetric trigger points, so reduces timing errors on the edge slew rates.

[Chris Mr]

The data slicer idea also has the issue that the hysteresis point is always centred on mid VCC due to the output always being either VCC or 0.

You could differentiate the input using C/R to the mid point but the same can be said for the Schmitt trigger input idea.

The opamp will have slower output edges than a logic gate; another consideration.

In the data slicer analysis idea above there is no bounce lower (or higher) as there is in the original.  The hysteresis has to overcome that and the OP doesn't say how likely that bounce is to increase.. or how likely the offset voltage is to shift.

For such a simple thing (which virtually nothing electronic is  ) there are still a lot of unknowns.

[Chris Mr]

Oh, and no, a Schmitt input doesn't draw more current when at the mid point.  Other HC logic will (probably) but not Schmitt inputs, that's why we have them!

[Smokey]

Sure. The blue signal has a DC bias of approximately +1.5 V. Its rising edge reaches 2.5 V, while the falling edge goes down to 0.5 V.
The square wave should be at CMOS logic levels.
As for tracking accuracy, it only needs to be maintained for a few microseconds, it's not a particularly critical requirement.

A comparator with user defined hysteresis will do that. ( 3 or 4 resistors)
You set the slice points clear of the bounce area. If the 1.5V varies, you could add a low pass filter opamp buffer so the slice points move relative to that. eg mid +500mV mid -500mV

I just did this recently.  Here is a decent calculator: https://dev.ti.com/gallery/view/7480196/Comparator_Hysteresis_Tool/ver/1.0.2/

[corgon]

I could not replicate the OP's original signal 100%, but that shouldn't make a big difference.

So, I tried replicating your suggested circuit. I used an LM393 and the passive components exactly as shown in the schematic.
However, the result isn't what I expected.

The blue trace is the input signal, and the yellow trace is the comparator output.

[langwadt]

Just so I'll know for future reference, why wouldn't a 74HC non-inverting buffer with a schmidt trigger input work for this?  If there is one.  Or possibly the SN74LVC1G17 I posted about before.
maybe with an added feedback resistor.

It can, but the original signal is DC offset from the average of the schmidt trigger points of a HC gate,

but spot on for something like a 74HCT14

[corgon]

PCB.Wiz

And the output from your circuit looks like this:

[PCB.Wiz]

Oh, and no, a Schmitt input doesn't draw more current when at the mid point.  Other HC logic will (probably) but not Schmitt inputs, that's why we have them!

You seem to believe some magic happens.  Schmitt pins change the Icc-Vin curves by splitting them. but no, the Icc problem remains.
The vendors data sheets quite clearly shows the effect, this from Nexperia 74LVC1G17

This graph shows a mid-hyst-biased part will draw static Icc of either 1mA or 3mA depending on state. That is much higher than a comparator.

[PCB.Wiz]

Just so I'll know for future reference, why wouldn't a 74HC non-inverting buffer with a schmidt trigger input work for this?  If there is one.  Or possibly the SN74LVC1G17 I posted about before.
maybe with an added feedback resistor.

It can, but the original signal is DC offset from the average of the schmidt trigger points of a HC gate,

but spot on for something like a 74HCT14

Not quite - see these Nexperia curves. It is not 'spot on' unless you adjust Vcc to an unusual value.

[PCB.Wiz]

PCB.Wiz

And the output from your circuit looks like this:

What Comparator did you use ?
That looks like it is not switching with +ve feedback, but trying to follow. (ie positive feedback is not winning )
A small C across R11 can be tried if there is no internal hysteresis.

[Chris Mr]

Here's a different idea.. simple in that it doesn't use any current when it's not doing anything.

I've used 100K, 47K and 100pF just as a starting point.  The idea is that each half processes just one edge.  When the input changes rapidly enough to overcome the 100pF and 100K and it's more than 0.66v the output changes state.

It'll work with drifting input and also as long as there is more than 0.66v of change.

[Chris Mr]

Should have read 100pF and 4K7 

And, of course, the output is the wrong way up!

But it shows the idea

[corgon]

LM393N

[corgon]

Here's a different idea.. simple in that it doesn't use any current when it's not doing anything.

I've used 100K, 47K and 100pF just as a starting point.  The idea is that each half processes just one edge.  When the input changes rapidly enough to overcome the 100pF and 100K and it's more than 0.66v the output changes state.

It'll work with drifting input and also as long as there is more than 0.66v of change.

Perhaps it's due to my lack of experience, but I can't get this transistor circuit to work. There is no output signal at all.