Yes, and note that output voltage range is similarly limited by input common mode range. The diff pair does weird things when you violate that -- namely, one transistor saturates, the other transistor takes up the balance of the tail current, and the emitter and collector voltages track with the input -- this may cause phase inversion, putting a notch or "nipple" on your previously smooth sine wave.
So it's no accident that the two most common improvements to this circuit, are to extend these ranges: a CCS for the tail, and holding the collector load voltage near zero with a current mirror or the base of a common-emitter stage.
Before integrated operational amplifiers became less expensive, it was common to have a 50 volt supply just for the tail current of the differential pairs to increase their common mode rang to useful levels. Note that this does not require high voltage transistors because this supply is applied to the forward biased emitters.
Yup, same works for the collector load too, of course -- AoE has a problem in one of those sections, asking why the gain of an "ideal" design common-emitter stage (resistor biased) is a constant. Well, it's ~20 when Vc ~ (V+) / 2, but we don't need to choose this, and indeed we're left with enough headroom for the application, we can set it arbitrarily close to saturation, more than doubling that figure.
Another way to think of it, consider the "barn roof" response of a common-emitter stage with no degeneration: the slope is steepest (instantaneous gain highest) just before saturation.
Tim