Author Topic: Interfacing slow logic to 74LVC: am I overthinking this?  (Read 454 times)

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Offline shapirusTopic starter

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Interfacing slow logic to 74LVC: am I overthinking this?
« on: May 17, 2024, 07:46:53 pm »
I need to feed two LM393 comparator outputs (with pull-up resistors) into a 74LVC1G00 NAND gate. Power supply voltage is 5V. Since the 74LVC inputs are fairly high impedance, I want to use high(ish) value resistors for the pull-ups, say 50k..100k.

However, if we consider the typical input capacitance of the 74LVC gate given in the datasheet as 4 pF, then the rise time with a 50k resistor is going to be about 200 ns. To satisfy the recommended slew rate of 5ns/V (which is 25ns/5V), the resistor would have to be 6.2k, which will mean a considerable current draw when the comparator is sinking.

Besides, now that I'm writing this, I realize that the comparator itself is much slower than even that -- I believe its transition speed in either direction is in the single-digit microseconds range, so the value of the resistors is not even relevant.

Now, I have two options.

Variant 1, aka "plug and pray":




Variant 2, use non-inverting Schmitt trigger buffers, as the textbooks say:




How really important is it to straighten up the edges before feeding them into a logic gate which does not have Schmitt trigger on the inputs? Yes, it surely is if we switch states frequently, but in this particular case switching may happen only once or twice after the device is powered on.

p.s. yes I know about the 74LVC1G132 NAND gate which has Schmitt trigger inputs. Unfortunately it's not available for purchase locally in the SOT-23 package, but only in the tiny SC-70 (DCK), which I would like to avoid (even though I have some of them already in my parts stock). Let's just assume that the 00 gate will be used, even if I decide to go with the 132 in the end, as the main question of this thread is practical aspects of feeding slow edges into non-Schmitt trigger inputs rather than finding a one-off solution in a specific case.
« Last Edit: May 17, 2024, 07:49:11 pm by shapirus »
 

Offline tggzzz

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Re: Interfacing slow logic to 74LVC: am I overthinking this?
« Reply #1 on: May 17, 2024, 08:06:29 pm »
Some possible consequences of slow input transitions are that the output may oscillate, and (separately) the power supply current will be higher in the transition region.

Whether that matters depends on the rest of the circuit.
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Offline T3sl4co1l

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Re: Interfacing slow logic to 74LVC: am I overthinking this?
« Reply #2 on: May 17, 2024, 08:26:06 pm »
To satisfy the recommended slew rate of 5ns/V (which is 25ns/5V), the resistor would have to be 6.2k, which will mean a considerable current draw when the comparator is sinking.

Why is this a concern?  I would normally use LM393 with 1-6mA I_OL to best take advantage of its speed (the edge rate is ca. 200ns; the delay is only ~µs for very small (~mV) input changes -- or, it's a knock-off "clone" that's different altogether; I have seen CMOS parts masquerading under deceptive part numbers before, e.g. 3Peak Inc. LM2903A-SR*, beware!).  You didn't mention any supply current limitations so I'm going to assume it's a non-issue.  Using something as hungry as LM393 also seems suspect to that end (but, it is one of the most available chips worldwide, and perhaps better alternatives aren't).

(*Which to be fair, at least by the datasheet, it looks like a pretty good part; it doesn't have the one-input-above-V_ICM behavior, but that's easy enough to do without, and the parameters are generally satisfactory, plus the open-drain output has better saturation behavior.  Still, it's almost certainly not the same kind of part, and some caution should be used when making such substitutions.)

For 5V comparator duty, I normally reach for MCP6562, a nice low power, faster, CMOS output device.  I've seen it go in and out of stock over the years, and maybe it's not very available in your region, I don't know.

Also last time I checked, comparators were kind of bimodal, i.e. you have the traditional and slow and micropower ones (t_PHL/LH > 200ns), and the super fast ones (<10ns), with not much inbetween (MCP6562 being one of the few exceptions at ~50ns).  It's overkill, but a fast one might prove effective anyway; certainly more suitable for 74LVC, even if you don't actually need the response speed.

May also be an option to (ab)use LVDS receivers as comparators -- if they have a wide input CM range (and most are rail to rail), that should be well enough behaved, and as I understand it, they regularly outperform the rather pessimistic 100mV spec that LVDS requires -- particularly if you can [self-, even?]calibrate out the offset in the application, or a little offset is acceptable.

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Offline Benta

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Re: Interfacing slow logic to 74LVC: am I overthinking this?
« Reply #3 on: May 17, 2024, 08:37:37 pm »
Third option:
use a 74LVC1G132.

Problem solved.
 
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Offline shapirusTopic starter

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Re: Interfacing slow logic to 74LVC: am I overthinking this?
« Reply #4 on: May 17, 2024, 09:33:58 pm »
Some possible consequences of slow input transitions are that the output may oscillate, and (separately) the power supply current will be higher in the transition region.

Whether that matters depends on the rest of the circuit.
Good point about oscillations. I will have to test that to see how the outputs actually behave. Power supply current yes, but I don't think (guesstimating a possible thermal impact) it'll be damaging if there will be a single 1-2 us input transition in a long time.
 

Offline shapirusTopic starter

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Re: Interfacing slow logic to 74LVC: am I overthinking this?
« Reply #5 on: May 17, 2024, 09:58:57 pm »
To satisfy the recommended slew rate of 5ns/V (which is 25ns/5V), the resistor would have to be 6.2k, which will mean a considerable current draw when the comparator is sinking.
Why is this a concern?
a) if I can prevent wasting yet another milliamp (here and there) in the stable state, I prefer to do it, within reason, of course. Current limitations aren't too low, this will be powered from USB, so kinda sorta 500 mA if we play by the rules of the non-PD ports, even though I know that most USB PSUs will deliver 1 to 2 amps no questions asked. Of this 500 mA, however, most will be dedicated to a power-hungry subcircuit, so the lower the consumption of the logic part will be, the better.

b) as I said, it may turn out that the resistor's value will be irrelevant. I will have to measure the actual LM393's transition time with different resistors, and I expect it to be in or close to the microsecond range -- well outside the non-Schmitt 74LVC inputs recommended range. I'll post some oscillograms of that here for the sake of completeness when I do it.

  I would normally use LM393 with 1-6mA I_OL to best take advantage of its speed (the edge rate is ca. 200ns; the delay is only ~µs for very small (~mV) input changes -- or, it's a knock-off "clone" that's different altogether; I have seen CMOS parts masquerading under deceptive part numbers before, e.g. 3Peak Inc. LM2903A-SR*, beware!).  You didn't mention any supply current limitations so I'm going to assume it's a non-issue.  Using something as hungry as LM393 also seems suspect to that end (but, it is one of the most available chips worldwide, and perhaps better alternatives aren't).
Yeah, well, again, will need to test my specific parts, which are supposed to be genuine TI ones. I've never tested how fast they switch, and now I have a good excuse for that.

For 5V comparator duty, I normally reach for MCP6562, a nice low power, faster, CMOS output device.  I've seen it go in and out of stock over the years, and maybe it's not very available in your region, I don't know.
Yes, that's a good idea, and for this specific task a CMOS output comparator (rather than an open collector one) will actually be a better choice.

Thanks for the tip on the specific IC, which, as it turns out, is actually sold here, and in the convenient SOIC-8 package too. Not super cheap at just below $1 apiece, but I think I will still grab some to use where CMOS output can be better than open collector.

I also have some TLV3501s, but I don't want to waste them on this particular device, these are going to wait for something that actually requires high speed.

May also be an option to (ab)use LVDS receivers as comparators -- if they have a wide input CM range (and most are rail to rail), that should be well enough behaved, and as I understand it, they regularly outperform the rather pessimistic 100mV spec that LVDS requires -- particularly if you can [self-, even?]calibrate out the offset in the application, or a little offset is acceptable.
Good to keep in mind as a possible technique (yet another!), but in this case nah, it's simply not worth it, when compared to using two additional buffers (or the SC70 74LVC1G132 gate).
 

Offline shapirusTopic starter

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Re: Interfacing slow logic to 74LVC: am I overthinking this?
« Reply #6 on: May 17, 2024, 10:25:48 pm »
Another interesting comparator: TS3702: cheap, pin-compatible with LM393, micropower, push-pull output, up to 16V supply voltage. Fall time at 5V supply is specified at 30ns, rise time is, for some reason, unspecified.

So it's another possible option where push-pull output is needed, especially if supply voltage is higher than 5V.
 

Offline shapirusTopic starter

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Re: Interfacing slow logic to 74LVC: am I overthinking this?
« Reply #7 on: May 18, 2024, 09:44:57 am »
b) as I said, it may turn out that the resistor's value will be irrelevant. I will have to measure the actual LM393's transition time with different resistors, and I expect it to be in or close to the microsecond range -- well outside the non-Schmitt 74LVC inputs recommended range. I'll post some oscillograms of that here for the sake of completeness when I do it.
I was wrong. Output transition time is actually not that bad (even if still outside of the 74LVC recommended range).

Here's what I measured for three different values of the pull-up resistor. Supply: 5V, load: 10x oscilloscope probe with a spring ground lead, assembly: solderless breadboard (with a 47 uF electrolytic cap across the 393's + and - supply pins for decoupling).

1. 1.8 kOhms




2. 5.1 kOhms  (note that timebase is different starting from here: 500 ns instead of 100 ns in the previous capture)




3. 22 kOhms




This falling edge is just fine to feed into non-Schmitt 74LVC inputs, I believe, but rising edge is still not good enough if we trust the stated recommended operating conditions. In practice, though, something tells me that it still shouldn't be an issue with a pull-up resistor of 5k or thereabouts. Even so, I am now inclined to use a push-pull output comparator instead: less parts, less board space used, tidier schematics, etc.
 

Offline xvr

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Re: Interfacing slow logic to 74LVC: am I overthinking this?
« Reply #8 on: May 18, 2024, 08:28:44 pm »
Check diagramm on output of 74LVC1G00. Possible ringing would be observed there, not at LM393 outputs.
 


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