Intrinsic Gate resistance of FQP9N90C MOSFET?

[ocset]

Hi,

Do you know what is the RG value for the FQP9N90C MOSFET?
The datasheet does not say.
Presumably we have to work it out from the “turn on rise time” listed on page 2?

So, Ciss * R = 120ns
Therefore R = 120ns/Ciss = 57.1…it says the added R(gate) is 25 ohms, therefore, the intrinsic gate resistance must be 57.1 – 25 = 32 Ohms?

FQP9N90C datasheet:
www.onsemi.com/pub/Collateral/FQPF9N90C-D.pdf

[ogden]

DC resistance shall be calculated out of Gate-Body Leakage Current using Ohms Law: 100 nA @ Vgs = 30V

In case you are looking for reactance, you may want to read following or other similar appnotes lying around internet:
https://www.vishay.com/docs/73217/an608a.pdf

[ocset]

Thanks, but the intrinsic gate resistance of a mosfet is usually a few Ohms up to a few tens of Ohms.

[ogden]

Thanks, but the intrinsic gate resistance of a mosfet is usually a few Ohms up to a few tens of Ohms.

Did you read document? It has all info you need.

I may stand corrected, but I would calculate Rgs_internal this way: First calculate (initial) current of Td_on and Qgs mesurement, Igs = Qgs/Td_on. Then Rg_internal = Vgs/Igs - Rgs_external. As we know that Vgs used is 10V, calculation is: Rgs_internal = (10 / (Qgs/Td_on)) - 25. Thing is that Td_on specified is quite a range, 50..110 ns, so you shall calculate for min/max

[edit] Approach above is not correct. Better just use RG_internal from datasheet or assume it being around 1 ... 1.5 Ohms or so.

[T3sl4co1l]

Their 25 ohm test is going to be too slow to derive an accurate R_G figure from.

Tim

[ogden]

Their 25 ohm test is going to be too slow to derive an accurate R_G figure from.

Nah. They use 25Ohms for a reason. Check datasheet, it's 900V mosfet with 1.1 Ohm (!) Rdson. My Rg_internal calculation was 13 Ohms - that's why I said that I am not sure

[ocset]

Thanks Ogden, i make it 13ohms to 59 ohms for RG_internal with your method........seems a very wide range...usually there is just a single value for RG in most other datasheets.
Still i see the logic.

[ogden]

usually there is just a single value for RG in most other datasheets.

Are you sure? Properties change with temperature, Rgate shall do it as well. Just simple example from document mentioned in this thread, attached. Note Rg range, from 0.3 to 2.3 Ohms

Datasheet here

[T3sl4co1l]

Note that RG also depends on frequency, in general.  It's an ESR figure, not a real resistance.

A naive design has uniform gate metallization, which has an RC transmission line characteristic, and a 1/sqrt(f) performance drop in the cutoff band.  2N7002 is an example (above 20MHz or so).

I've seen transistors that have a pretty nearly constant resistance, i.e. the gate equivalent circuit is a series RLC within the limits of measurement (up to maybe ~100MHz bandwidth and a few percent impedance error).  The construction is probably a fractal gate connection, so the myriad transistor cells are the same distance (in terms of ESR, ESL and distributed capacitance) from the wirebond.  This was an SiC transistor.

Tim

[ogden]

Note that RG also depends on frequency, in general.  It's an ESR figure, not a real resistance.

ESR indeed it is [facepalm]. Thank you for clarifying.

[ocset]

actually the method of post #3 does not seem to work with the IPP90R1K2C3 FET.

The stated RG (admittedly at 1MHz) is 1.3 Ohms................but the method of #3 above gives it as 25 Ohms.

IPP90R1K2CE FET
https://www.infineon.com/dgdl/Infineon-IPP90R1K2C3-DS-v01_00-en.pdf?fileId=db3a30432313ff5e0123a89fe8085c04

The IPP90R1K2C3 FET has an RG figure of 1.3 Ohms, but then in the "conditions" column of page 3 it syas "RG = 81.3 Ohms".

What we wish to do is find RG as part of our setting of our external series gate resistance..................we will of course carry out tests and modify in accordance, but we wish to set an initial value for the series gate resistor.
As you know, this resistor has a big impact on the switching losses.

[ogden]

actually the method of post #3 does not seem to work with the IPP90R1K2C3 FET.

The stated RG (admittedly at 1MHz) is 1.3 Ohms................but the method of #3 above gives it as 25 Ohms.

Then use datasheet figure and do not calculate using post #3 method [edit] Most likely it is not correct. I added note in original post as well. [/edit] Obviously if you want to know Rg at patricular frequency ( @ 1MHz ) as specified in the datasheet - use LCR meter. Post #3 is simplest possible way to get ballpark value and obviously does not account for fact that Rg_internal is ESR figure.

The IPP90R1K2C3 FET has an RG figure of 1.3 Ohms, but then in the "conditions" column of page 3 it syas "RG = 81.3 Ohms".

To me it looks like sum of external 80 Ohms resistor and 1.3 Ohms Rg_internal which were used for tests to get particular results.

What we wish to do is find RG as part of our setting of our external series gate resistance..................we will of course carry out tests and modify in accordance, but we wish to set an initial value for the series gate resistor.
As you know, this resistor has a big impact on the switching losses.

What can I say... There's more productive way of getting information you want than forum post: google search for application notes of MOSFET manufacturers. I typed in "mosfet gate resistance considerations" and got very good document for you as first hit:

https://toshiba.semicon-storage.com/info/docget.jsp?did=59460&prodName=TK5Q65W

[T3sl4co1l]

I measured this.



Sorry it's FQA (TO-3P), not FQP.

Tim

[ogden]

I measured this.

Sub-ps time resolution, huh? - Impressive stuff. It is TDR instrument or pulser+scope? Could you please tell more about how, using what tools you measured and then how calculated RG_internal?

Most likely it is not how commercial(?) supplies shall be made, but I would not waste time measuring/calculating. Anyway external gate resistor will be as small as possible and my feeling tells much less than 80 Ohms. So I would start with minimum value my gate driver can switch into gate capacitance without blowing up, like <= 10 Ohms, then look - it pass or fails EMC. If pass then that's it, job is done.

[T3sl4co1l]

As crude as can be, avalanche pulse generator (waveform into 50 ohms shown as Ref), BNC tee to binding posts and scope; binding posts to twisted pair up to gate.  Waveforms are interpolated from a 10GS/s acquisition (equivalent time sampled, 350MHz BW).

Note that the scope and source act in parallel, hence Rsrc = 25 ohms.

Decimals are incidental (why bother rounding down?).  The RLC network is simulated with a modest timestep because it's easily written that way (naive Newton integration), but high frequency elements are easily divergent at this scale (e.g., if C is made to be a few pF, or L1 or L2 is made similarly small), and a better integration method would be beneficial (trapezoidal, RK2..).  I don't feel like writing those out in a spreadsheet, much faster to load up another few thousand cells and run it again.

The L1-C-L2 parameters were intended to simulate the twisted pair, but it seems a best fit doesn't quite fit with those alone (i.e., the high frequency ringing isn't captured well).  I think an LC tank in series with what's shown would get closer (i.e., simulating mode conversion because twisted pair).  Anyway, that's just the tight squigglies, which it seems got averaged over pretty well on the best-fit, so that's nice.

The R value seems robust; it acts like a vertical offset to the 'rebound' phase of the waveform, and nearby values of R and C2 don't fit nearly as well as these do.

Tim

[ogden]

As crude as can be, avalanche pulse generator (waveform into 50 ohms shown as Ref), BNC tee to binding posts and scope; binding posts to twisted pair up to gate.  Waveforms are interpolated from a 10GS/s acquisition (equivalent time sampled, 350MHz BW).

Wow, nice. I was aware of TDR impedance measurements, but did not consider such as practical. Thank you for info!

[T3sl4co1l]

The important thing here is, it seems to fit well, without having a distributed RC characteristic (which would be represented by multiple R+C in parallel, of geometrically spaced R and C values).

Testing, I find 3.279 mV RMS error with an RC, and 3.278 with an (R1+C1) || (R2+C2) network (R1 = 1.337, R2 = 10.09, C1 = 2.088, C2 = 1.162).  The captured waveform is 40ns long, so both time constants (2.8ns, 11.7ns) are significant and accounted for.

Not finding any success with a couple of tweaks to try and reproduce the high frequency ringing.  It should only be an artifact of my setup, anyway.

Tim