Author Topic: Looking for help understanding this op amp design  (Read 873 times)

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Offline curtosisTopic starter

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Looking for help understanding this op amp design
« on: March 25, 2026, 02:15:36 am »
(I apparently used to have an account but have been away long enough that it got purged, so I'm not as totally green as I look. :))

Anyway, this module1 is ostensibly an audio signal detector that takes either balanced audio (top half) or unbalanced (bottom half) input an produces a "turn on the amplifier" signal at the ON/OFF output. The two paths are identical except for the input impedance and balanced->unbalanced stuff. The ON/OFF output goes to a GPIO pin on an 8051 MCU (edit: SH88F2051A); I don't have easy access to the MCU code, so I'm working backwards to at least figure out what it's seeing.

From what I've been able to figure out so far:
  • the LMV358 is set up as a differentiator
  • the feedback caps (C134/C135) are there to keep it well-behaved and filter off the higher frequencies
  • the diode pairs work to clamp the output to around ±0.35V (half of Vf = ~0.715V)
If I run it thru LTspice with a 1kHz sine input I get a square-ish wave ±0.35V (180° out of phase, as expected for a differentiator).

My questions are: first and foremost, how off base am I so far?  :-\  And secondly, if my read is correct, how does that output make sense as an input to an MCU?

Thanks!

1 I redrew it from the original, which buried all the passives values in a table.
« Last Edit: March 25, 2026, 01:37:05 pm by curtosis »
 

Online MariuszD

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Re: Looking for help understanding this op amp design
« Reply #1 on: March 25, 2026, 06:59:20 am »
This is not a differentiating circuit because even at 20Hz, the impedance of a 10uF capacitor is much lower than the resistance of 10kOhm. The capacitor only blocks the DC component. This is a regular differential and inverting amplifier. The differentiating circuit would shift the phase by 90°.
 
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Online PGPG

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Re: Looking for help understanding this op amp design
« Reply #2 on: March 25, 2026, 11:35:48 am »
the diode pairs work to clamp the output to around ±0.35V (half of Vf = ~0.715V)

This suggests that you think that diodes connected in paralel will have their Vf divided by 2.
It is not so. Diodes are not resistors.

how does that output make sense as an input to an MCU?

That output has no sense as GPIO uC input.
It would have sense if uC will have at this input comparator or A/D converter.

I've tried to find what 88F205A is but I don't see anything sensible.
 
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Offline curtosisTopic starter

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Re: Looking for help understanding this op amp design
« Reply #3 on: March 25, 2026, 01:38:23 pm »
This is not a differentiating circuit because even at 20Hz, the impedance of a 10uF capacitor is much lower than the resistance of 10kOhm. The capacitor only blocks the DC component. This is a regular differential and inverting amplifier. The differentiating circuit would shift the phase by 90°.

OK, I think that makes sense.
 

Online MariuszD

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Re: Looking for help understanding this op amp design
« Reply #4 on: March 25, 2026, 02:08:00 pm »
the diode pairs work to clamp the output to around ±0.35V (half of Vf = ~0.715V)

This suggests that you think that diodes connected in paralel will have their Vf divided by 2.
It is not so. Diodes are not resistors.
Assuming that only one amplifier is working at a time, R197 and R198 divide the signal in half.
 
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Offline curtosisTopic starter

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Re: Looking for help understanding this op amp design
« Reply #5 on: March 25, 2026, 02:47:53 pm »
the diode pairs work to clamp the output to around ±0.35V (half of Vf = ~0.715V)

This suggests that you think that diodes connected in paralel will have their Vf divided by 2.
It is not so. Diodes are not resistors.

Yup, lazy/late-night thinking from me. At the very least, they seem to have the effect of clamping it, and the math looked close enough to fool me. So what/how are they there for?

Quote
how does that output make sense as an input to an MCU?

That output has no sense as GPIO uC input.
It would have sense if uC will have at this input comparator or A/D converter.

I've tried to find what 88F205A is but I don't see anything sensible.

Sorry, typo from me. It's an SH88F2051A. That pin can be an ADC input with a built-in comparator, a GPIO, or an interrupt.

So in terms of intent, a hypothesis would be it's working as an (inverting) conditioner/filter for the comparator, envelope follower-ish? Which makes me wonder: 1) why pick 0.35V as a level to limit it to? (Vref for the ADC is VDD = +3.3V), and 2) why leave it bipolar?
 

Offline curtosisTopic starter

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Re: Looking for help understanding this op amp design
« Reply #6 on: March 25, 2026, 02:52:25 pm »
Right, both inputs wouldn't normally be used at the same time, but throughout it just mixes the two.
 

Online PGPG

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Re: Looking for help understanding this op amp design
« Reply #7 on: March 25, 2026, 03:59:34 pm »
So what/how are they there for?

In my opinion this circuit is to normalize output signal amplitude.
3.6M in feedback sets OpAmp gain to very high value but limited by diodes (OpAmp output limited to about 0.7 what gives at circuit output about 0.35V).
You should get about the same Vpp output voltage for wide input signal amplitude range.

Sorry, typo from me. It's an SH88F2051A. That pin can be an ADC input with a built-in comparator, a GPIO, or an interrupt.

So using this input uC can get info - there is some analog signal at this OpAmp circuit input.

1) why pick 0.35V as a level to limit it to? (Vref for the ADC is VDD = +3.3V), and 2) why leave it bipolar?
Having GND as reference makes some things easier sometimes.

If the uC input can be comparator input then setting the other comparator input at GND (may be possible by internal settings without using another pin) allow for just getting this signal.
uC input probably is protected by diodes to GND and VCC. Driving it to -0.35V seems safe.
« Last Edit: March 25, 2026, 04:10:04 pm by PGPG »
 
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Online PGPG

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Re: Looking for help understanding this op amp design
« Reply #8 on: March 25, 2026, 04:07:07 pm »
the diode pairs work to clamp the output to around ±0.35V (half of Vf = ~0.715V)

This suggests that you think that diodes connected in paralel will have their Vf divided by 2.
It is not so. Diodes are not resistors.
Assuming that only one amplifier is working at a time, R197 and R198 divide the signal in half.

My mistake. I understood that OP says about OpAmp output and not whole circuit output.
 
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Offline adinsen

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Re: Looking for help understanding this op amp design
« Reply #9 on: March 25, 2026, 04:44:46 pm »
The circuit reminds me of a guitar distortion pedal. The diodes work as nonlinear feedback devices and used like this creates a rounded square wave like the one you are seeing in your simulationI think the purpose of this circuit is just to amplify any signal to a certain, detectable level. The diodes make it work as a super simple compressor - not minding the distortion. Perhaps the designer just copied the circuit of some random guitar pedal he or she had at hand. Did you mention which pin on the CPU the output signal is connected to?
 
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Offline curtosisTopic starter

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Re: Looking for help understanding this op amp design
« Reply #10 on: March 25, 2026, 04:58:15 pm »
The circuit reminds me of a guitar distortion pedal. The diodes work as nonlinear feedback devices and used like this creates a rounded square wave like the one you are seeing in your simulationI think the purpose of this circuit is just to amplify any signal to a certain, detectable level. The diodes make it work as a super simple compressor - not minding the distortion. Perhaps the designer just copied the circuit of some random guitar pedal he or she had at hand. Did you mention which pin on the CPU the output signal is connected to?

Interesting! And yeah, feeding it with 0.2V P2P outputs at the same ~0.38V level. It's on pin 10 (SOP16 package), which is labeled P1.2/INT2/AN2/TDO.
 

Offline adinsen

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Re: Looking for help understanding this op amp design
« Reply #11 on: March 25, 2026, 07:53:43 pm »
Interesting! And yeah, feeding it with 0.2V P2P outputs at the same ~0.38V level. It's on pin 10 (SOP16 package), which is labeled P1.2/INT2/AN2/TDO.

AN2 could be used as one of the analogue inputs via the 10 bit ADC and the firmware would then just see if it detects changing levels indicating there's sound on the input?
 
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Offline ledtester

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Re: Looking for help understanding this op amp design
« Reply #12 on: March 25, 2026, 08:29:42 pm »
Can you get a scope trace of the voltage at the MCU pin?

That would confirm (or not) what the simulation is showing.
 
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Offline curtosisTopic starter

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Re: Looking for help understanding this op amp design
« Reply #13 on: March 27, 2026, 01:31:16 pm »
Yeah, that's probably the next step — there's even supposedly a test point on the output of this block. Which is a good reason to pull the trigger on ordering a new scope. :)

The device I'm investigating is a powered monitor speaker with a very annoying auto-shutoff. Or more precisely, a too-insensitive auto-wake. I got the service manual and wanted to see how far I can get in understanding it first before opening it up. My initial guess was a triggered slow timer driving a logic input to the amplifier IC (TPA3245) or MCU, but it seems to be a bit smarter in only waking up on actual audio-frequency inputs.
 

Offline Terry Bites

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Re: Looking for help understanding this op amp design
« Reply #14 on: March 27, 2026, 06:07:59 pm »
A serious distortion generator if it’s truly as shown. Nah.... Look again.

My guess is that the diode clamps shown as being connected around the opamps are drawn in the wrong place.

It would make far more sense if all inputs had the same clamping arrangement.
Why clamp XLR+ but not XLR-. That makes no sense at all. Why not clamp RCA in too. These clamps should all be connected after the input resistors.
 
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Offline curtosisTopic starter

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Re: Looking for help understanding this op amp design
« Reply #15 on: March 28, 2026, 12:57:17 am »
A serious distortion generator if it’s truly as shown. Nah.... Look again.

My guess is that the diode clamps shown as being connected around the opamps are drawn in the wrong place.

Double-checked with the published drawing, and it's correct.

Quote
It would make far more sense if all inputs had the same clamping arrangement.
Why clamp XLR+ but not XLR-. That makes no sense at all. Why not clamp RCA in too. These clamps should all be connected after the input resistors.

The XLR+ diodes are both connected to GNDD, so I figured they're just forcing the balanced input to unbalanced. After the caps C129/130/133 the two paths are identical.

As far as the diodes in the feedback paths, could they be there to keep the fb voltage from hitting the power rails? Just a stab in the dark.

I'm still curious why triggering the ADC comparator interrupt with the input signal (per the working theory above) is the route they went here. But then again, I haven't thought too hard about how *else* I'd do it, and a couple cheap op-amps and an 8051ish MCU might actually be pretty effective. Something like, reset a timer every time you get > n interrupts over some small interval, and if the big timer runs out power down the amps. Seems like fairly trivial code.

When my scope gets here I'll probably probe it along with a logic analyzer on the MCU outputs and see what's actually going on. (I might even get lucky and be able to pull the code off the MCU via JTAG, but not counting on it.) I bet I could either hook in a dumb 555 to always give an input or pull up the logic outputs to always keep the amps on.

Somewhat amusingly, the updated version of these monitors added a switch to turn off the auto-shutoff (it's an input to the MCU).

But it's a quest for me to understand and master it at this point, which I'm sure nobody here would understand. :)
 


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