You'll need to look at either the address-decoding hardware or (if the system has one) the setup of the MMU.
It's very common to boot from ROM at address 0x0 and after initial setup remap the ROM to somewhere else in the memory map.
I woul like to know the name of that address-decoding hardware. Would do some Google search for it
Architecture is mips_24kc. CPU is Qualcomm Atheros QCA9558
FWIW, here are the commands used:
ap135> tftp 0x80060000 wr1043nv2_tp_recovery.bin
ap135> erase 0x9f020000 +0x7c0000
ap135> cp.b 0x80060000 0x9f020000 0x7c0000
ap135> boot.m 0x9f020000
As I understand it:
Download binary image, put it at address 0x80060000
Erase memory range from address 0x9f020000 to 0x9f020000+0x7c0000
copy what is at address 0x80060000 at address 0x9f020000 size is 0x7c0000
boot with image located at address 0x9f020000
Firmware image has to go right after U-boot partition (128 KiB). So I guess 0x9f020000 maps that. Is this right?
Flash layout attached.
I would love to know how memory addresses are calculated from the flash layout data