Heh, yeeeeah... that's kinda how it goes.
It may interest you to know, there exists an equivalence, and transformation, between transmission line segments and LC sections. So, this can be done rigorously!
However, this is usually more of a narrow-band approximation, allowing the design of various types of bandpass/stop filters, and the transformation into easily constructed transmission line networks.
I'm not so sure, though, that this would be beneficial in a wideband (e.g. time domain) context, where the number of elements required goes, I think quadratically, with delay-bandwidth.
It's not obvious if you're doing undergrad, graduate or doctorate, but it sounds like the kind of thing I would hope gets assigned to at least graduate-level students. I've met Dr.s that couldn't design a system like this. This project may be... overly ambitious. (Keep your options open, if you can.)
I will note that, at least regarding digital interfaces -- many of these are very robust to begin with, for exactly these reasons. You can't ensure good matching, or low HF losses, on cheap FR-4 PCB; so they go to great lengths to deal with slow edges, "drool" (compensated by pre-shooting at the transmitter), bounce (the receiver has a brief (fractional ns) dead time following a transition), delay and skew (resynchronization or adaptive delay of the whole bus, or sections of it, or individual lines of it), all the while pushing data rates incredibly high (DDR, QDR).
I forget exactly which of these is integrated with which standards, but IIRC they get more aggressive as the technology advances: DDR maybe nothing, DDR2 with say preshoot and bounce and whole-bus delay, DDR3 with segmented delay, etc.
In any case, the effect is to get nominal performance from the same basic crummy medium.
Obviously, you'll have a harder time doing that with a pristine 20GHz analog signal path; if you're running that into ADCs or whatever, you'll want to do that as soon as possible, and probably do it on quality laminates (usually Rogers something or other).
The other big thing -- besides cramming everything about design and layout -- is testing. Obviously, you need a 20GHz+ spec or scope or VNA to measure these things. This may already be available -- if your labs are well equipped -- but use them very carefully, besides the obvious concerns like expense, but more presently, because probing needs to be done perfectly. At these frequencies, you have to consider the electrical length of the probe tip and pins, and the effect of that stub on the actual in-circuit signals. And even with a JFET probe, you still get significant loading (more through this mechanism than through overall impedance).
Consider placing buffers and coax connectors on the PCB, so you can probe the signal with a cable, no need for probes with wobbly pins. Maybe make an assembly variant (optional jumpers/resistors) to divert the signals from between devices, to the test port.
Tim
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