MOSFET linear regulator circuit

[VEGETA]

my plan is to get 16*2 or 20*4 character LCD and a good PIC16 (or PIC18 at most since ADC and DAC will be external 16-bit). I have removed C16.

So here is what I've done;

1- change the SMPS to LT3757A instead of the one without A, because it helps in stability according to DSh [ http://cds.linear.com/docs/en/datasheet/3757Afd.pdf ].
2- removed C16 completely.
3- changed R9 to 2.5K for smaller drop voltage, could be changed later.
4- followed the DSh and changed the comp. network, it is now 10nF with 10K resistor, parallel with a small 100pF.
5- put the negative supply for the voltage monitoring op-amp so I can use something like LTC6085 (or LT1014/LT6012/LT6005 if our voltage won't suit 6085) for the 4 op-amps! nice consolidation.

Datasheet didn't specify a certain way for compensation, it just pointed out that I should pick values in the application part and modify them. You also seem to know much about this but I don't. How do I run tests?

Here is the quote from datasheet:

ThestartofeachoscillatorcyclesetstheSRlatch(SR1) and
turns on the external power MOSFET switch M1 through
driver G2. The switch current flows through the external
current sensing resistor RSENSE and generates a voltage
proportional to the switch current. This current sense
voltage VISENSE (amplified by A5) is added to a stabilizing
slope compensation ramp and the resulting sum (SLOPE)
is fed into the positive terminal of thePWMcomparator A7.
When SLOPE exceeds the level at the negative input of A7
(VC pin), SR1 is reset, turning off the power switch. The
level at the negative input of A7 is set by the error amplifier
A1 (or A2) and is an amplified version of the difference
between the feedback voltage (FBX pin) and the reference
voltage (1.6V or –0.8V, depending on the configuration).
In this manner, the error amplifier sets the correct peak
switch current level to keep the output in regulation.

So I guess if the values are too much, it will be slow. Is that correct? What is the indication and the thing we must see to say that circuit is complete and compensation is done? and is it now only lies in Vc alone?

_______

anyway, you haven't answered me about how CV op-amp works. I still didn't get it.

_____

I've searched and found LTpowerCAD 2 tool for doing compensation, it seems pretty powerful and novel! However, it doesn't support LT3757A!!!

[Kleinstein]

The CV OP is comparing the the weighted sum of the (negative) output voltage and the (positive) set voltage to zero. C11 and R33 are for compensation and set the AC performance. I would guess R33 should be more like 1 K. Depending on the set voltage source one could also use higher resistor values for that part.

For the SMPS part, a slow compensation is easier than a faster one. So something relatively slow could be at least a good starting point. A small value for R9 causes more feedback gain. So this could be a problem and might need adjusted compensation (e.g. larger cap at the VC pin). It is also important that the current sense resistor is not to small. 1 mOhm like is the spice file is too low - this sets the peak current limit. AFAIK it takes a 100 mV maximum drop, so something like 10 mOhms would allow up to 10 A of peak current from the source - much more is calling for trouble. Especially for a first test less current is preferred. However the sense resistor is also setting loop gain - so one should use the right value.

For the tests of the SMPS part, I would use a very much simplified version (e.g. no current limit, universal OP) of the linear stage. And than is is about load transients of something like 10 mA -> 1 A and back, at a few output voltages (e.g. 1 V, 5 V , 15 V). Simulation could use quite some time !

[VEGETA]

As for the SMPS sense resistor, I choose this value to allow for 2A output to be available. I will try changing it to 0.02 and see if it will output 2A or not. Theoretically it is like this:

R_Sense = 0.08 / I_switch_maximum

the rest of the formulas (approx. results):

I_L2 = I_out = 2A (max)
I_switching = 11A
thus R_sense should be 0.007R, assuming 22 volts of output voltage (affects max duty cycle calculations).

Gonna try out 0.01R for now, and I will update once it is done.

___

So you idea is to use a {STEP} parameter for the load current sink to make it 10mA,1A,10mA,2A of 5mS between each of them... or something similar, right? now what is there for us to see? I could make it and let it simulate until morning xD... with full design not simplified one.  Also make that thing that makes LTSpice does the simulation 3 times for 3 different voltages (I'd have to check it because I don't remember it). And why not adjust temperature to see if it does matter. Is that what you meant?

____

@CV op-amp:

so the - input is 0v while the positive is V_set + OUT-? like saying 2v set is going to give 20v output which means -20v of OUT-... 2 --20 = 22v. how does this compare to 0 here? what I think is it is going to be fast and more stable since it doesn't rely on a measuring op-amp (which adds another loop).

[Kleinstein]

The CV loop uses something line 1 x V_set + 0.1*(V_out-). So for example 2 V + 0.1 * (-20 V) ->0. There is no second OP involved. The voltage measurement is completely different.


For the simulations, it is more like having a pulse function for the load current (advanced options under current source) to give something like 30 ms with 10 mA, than 5-10 ms with 1 A and 5 ms with 10 mA. The length of the sections might need some adjustment, as it takes some time for startup and step
As even in individual simulation will take some time, one might want to do the simulations one by one, at least in the beginning. One could even first start with slightly smaller caps at the SMPS output to speed up startup.

A sense resistor of 7 mOhms or 10 mOhms is about the right size - much better than 1 mOhms.

[VEGETA]

as for R_sense what about 5mOhms? if it does work like the 7-10mOhms then these are what I found:

www.digikey.com/product-detail/en/panasonic-electronic-components/ERJ-MP4QF5M0U/P19420CT-ND/6096848
http://www.digikey.com/product-detail/en/riedon/CSR1206-0R005F1/696-1372-1-ND/2813305

the first one is 3W and the 2nd one is 1W with 1% tolerance (it is not important here I guess) with 0.5 ~ 0.57$. Cheap and available! what do you think?

I ran the simulation with 0.01R to give 20v @ 2A and it didn't work! 25mS and it didn't reach it, it flattens out at around 16v or so. Thus we need smaller one, I picked 5mR since it is a nice round number, calculations are as follows:

5mR -> P=I2R = 12*12*0.005 =~ 0.7W --> 12 is I_switch_max, actually it is around 11.
7mR -> P=1W approx.

So picking a 2W one is a lot safer and it is not even pricey! here is one for 7mR: http://www.digikey.com/product-detail/en/rohm-semiconductor/PMR100HZPFU7L00/RHM.007AUCT-ND/2094559

now, why it is "much better" than 1mR while not being so different? 5mR vs 1mR is not much at all really.
________

For my trial now of 5mR and Vc compensation capacitor of 10nF, it reaches 20v @ 2A in around 20mS which is a lot really, don't you think so? I am not even sure is it because of the sense resistor or the compensation cap or even the output caps? the output caps didn't change thus it is not the main issue. I suspect compensation cap has anything to do with it, so I am going to try returning it to 6800p (6.8n) to see the difference while having the same 5mR sense.

[Kleinstein]

It takes some time to charge up those relatively large output caps, especially if the supply also has to provide much of it's power to the output. So a 20 ms startup is not bad. The time constant at the VC pin is in the 10 K  * 10 nF = 100 µs range and thus much shorter.

Changing the sense resistor from 5 mOhms to 1 mOhms is like increasing the loop gain by a factor of 5. Due to the difference feedback, the loop gain already is higher than in most normal applications. Going for 2 K for R9 is also a factor 5 up in loop gain. Having a small R13 and capacitor in series might bring this back closer to 1 - still more than something like 1/5 you get for a normal divider to get a fixed 8 V output.

As the TC / precision of the current sense resistor is not critical, this could even be just a piece of wire - board trace or a fuse, if it is low enough in inductivity.

[VEGETA]

Well, isn't 20mS too slow for fast changes? or is it normal?

I tried changing it back to R9=10k (but drop out is still so low like 0.5v) while removing the 100pF cap from Vc, as well as removing most of output caps keeping only 2 of them one before the inductor L3 and one after. L3 is now 10uH to try filtering the current more. It settles around 15mS now but only reaches 19.5v not 20v. Remember that switching frequency is set to 300KHz, so will it be better to make it 100KHz (needs larger inductor but more efficiency) while it can operate at 2MHZ with less efficiency.

The result is something not good enough, there is a lot of ripple in current (around 200mA which is not acceptable because it will make current monitoring very bad!). So we are forced to accept 20mS or so?

[Kleinstein]

The startup part has three components: one is the initial startup for the controller chip. The second phase is charging the output caps at essentially the maximum current and the last part is approaching the final voltage. The only critical part the the last the other parts can be slow with little problem. One might not it on recovery from CC mode, when the voltage goes up a lot - but here one often adds a slow increase anyway. The response to load changes should also be reasonably fast and more important have little drop in the voltage in between, as this sets the minimum voltage difference for the linear MOSFET.

Something like 300 kHz might be an acceptable compromise, though still one the high side. A higher clock should also allow a faster response, so one might want such a high frequency. But I would not go much higher if you don't want a 4 layer board.

[VEGETA]

I modified it more, and here is the new stuff:

1- made the FBX resistors 1K and 20K which allows for a maximum output voltage of around 33v which is much higher than the maximum needed of 21v or so. I did so because I noticed the 0.5v dropout is not enough somehow.

2- modified output cap and L configuration, as you can see in the attached schematic (plz do ). I did so to eliminate the damn ripple (or noise) that exists nearly everywhere, in output voltages and current. It is still not cured even after this! so what to do?

3- made the final output cap (after linear stage) 47uF instead of 10, and picked an Ai elec cap model for it. I felt it will help eliminate noise but nothing is done xD. I hope this doesn't affect stability.

4- returned R9 to be 10k to make a bigger drop but it didn't do a thing, which is weird.
______

somehow, the 5mR resistor is causing the whole circuit to be slow, as the 1mR gives significantly faster reaching of the final output voltage. Now with 5mR it needs at least 25mS to go from 0v to 20v output.

You mentioned adjusting FBX resistor divider along with R9 to get better results... However, I made FBX resistors very small compared to the DSh examples. The equation is V_output = 1.6 * (1 + R2/R1) which is for 20k/1k equals 33.6v. We need 21v maximum so it is good... the good thing is that the tracking pre-regulator doesn't care about this, it only needs the full range to be covering the maximum output voltage it needs, which is the case of this circuit.

How to solve slowness problem now? and most importantly, the ripple and noise one?! this one is really annoying as it didn't appear before. If you think slowness is not a bad problem then it is ok, I just don't want critical problems to appear such as oscillation and CC not recovering.

thanks

[Kleinstein]

The SMPS part does not look good. It kind of oscillates and peak currents are really high and current flowing back an forth. For the first test with the SMPS one could replace the linear regulator with a more simple one. At least remove the current limit part and LEDs. This nearly doubles simulation speed.

[VEGETA]

This is yet another version, updates:

1- updated the switching frequency to 500KHz.
2- soft-start cap is now 10nF instead of 20nF, faster.
3- re-adjusted output caps and inductors. more frequency = faster response -> we can add more filtering and still get fast response.
4- R9 = 3.3K. this gives <2v but still not 1v. I didn't lower it more since you dislike it for some reason.
5- FBX R2 = 15k. Max allowed voltage is ~25.5v.
6- C8 is 10uF again.
7- most importantly, the coupled inductors are 10uH instead of 4.7uH. this is the key in my trials, I guess saturation has something to do with it.


Now oscillations are no more, just a very small SMPS output voltage ripple which is not significant, linear output is just perfect. Even current ripple when it is not yet reached it's value is not more than 50mA and when it reaches set value it is pure.

what do you think now?

[VEGETA]

I noticed something weird in the last circuit, which is when I make it 5v final output, the pre-regulated supply output voltage is very very large! like 15v! WTF!!

[VEGETA]

I redid the output caps and inductors along with other resistors... the result is better and faster! the only thing bad is the relatively huge ripple of the SMPS output voltage. I don't like the idea of putting 1000uF capacitors in the output of the SMPS (3 of them as the current setting) because it will be extremely slow and we won't benefit of upgrading from 300KHz to 500KHz this way. I updated the 2 output inductors to be 10uH each which eliminated all current spikes and ripple which is a great advancement! Output caps are 100uF each not 220uF like before.

What can we do to enhance this? or is it good enough and beyond further enhancements? If so, then we should start thinking about output enable circuit (activating and deactivating of linear mosfet gate?) or possibly a down programmer if it is useful. let's not argue about them now.


Also there seems to be a small error in current set, like 1-2mA less and I don't know why.

[Kleinstein]

The massive filtering is very good in suppressing high frequency ripple, but the feedback look of the SMPS is oscillating. This is expected for feedback from behind the filter. Also R13 will make the drop for the linear stage voltage dependent.: to higher at low voltages and low at a high voltage.

I would suggest replacing R13 with something like 10 K and a capacitor in series. And / or move R9 from the output after the filter to before the filter.

[VEGETA]

This is the response of the new one with your suggestion, 0.1uF+10k instead of the R13. filtering still there though. I noticed that the pre-regulated voltage keeps increasing gradually. SMPS voltage is not "pure" but it also not huge continuous ripple like before. Linear regulation is accurate and no problem with it.

I am interested to know why SMPS voltage is constantly ramping up, which leads to how can we fix it to an approximate fixed voltage. My point of view is that by putting a capacitor (0.1uF here) with R13, this makes it like an open circuit of some sorts, thus maybe affecting the feedback itself since it needs to have resistor network connecting from the output to the FBX like you know. By putting 125k resistor as R13 with no capacitor this puts a solid maximum allowed output voltage which equals to 21.6v but when it is open... I don't know, but the curves shows that no max voltage limit is there.

This is an image of making the FBX resistors 10K and 1k (instead of 10k to the OUT-), it is noticeably faster though:

[Kleinstein]

Reducing R12 to 1 K and keeping R9 at 10 K is asking for a rather high drop over the linear stage. So the voltage is still ramping up. If the current limit will not set in first, it would eventually stabilize at something like 30 V.

With the SMPS there is one point missing to make it work as intended: L1 and L2 are supposed to be coupled inductors. The coupling (K1 L1 L2 1) is missing.This makes the converter run much better, but I still have it close to the edge of oscillation. Attached is a version that just at the border to instability.
A simplified the linear part to speed up simulation - the final version would have to add things again, but for the SMPS part this does not matter. Also 10 V output is used to speed up simulation for the initial tests.

[VEGETA]

I think this is kinda complete now because I re-added everything else and modified it a bit to achieve 1v dropout (R26 = 2.5k) and eliminate as much noise as possible. What interests me is the little repeated noise or sparks (1-2mA) in the current output, they seem to fade out when I put something like 1000uF. This version does use massive filtering of around 9 of 100uF caps and 2 of 4.7uH inductors. Maybe we can live happily without all that but there will be that noise in current which is annoying since maybe 1mA can be set by the user (or maybe make it a minimum of 10mA to be more realistic).

There is also one weird thing which is the output of SMPS is not flat when I set the design for 20v. I mean it doesn't output 21v flat but with these mountains and valleys  . Perhaps this has something to do with the "repeated" noise in current. I think it is ok since the final voltage is from linear stage and will filter out all of that, but is it ok to put a very big filter to clean it out without bad side effects like slow response? or is it better to keep it this way?

As of your changes, interesting thing is the 10R you added to the shunt of the switching IC. it makes the total resistance 1uR less xD. What is the purpose? I understand the 100pF is for filtering. On the other hand the 20pF (C26) is for filtering too right? these values might be bad for consolidation purposes later on.

As for coupling, datasheet didn't make it a must but it did put it in the recommended parts. Your addition of that coupling parameter is nice since I thought the dots are enough for it. I picked 10uH coupled inductor because I saw a suitable cheap part for it, since the original datasheet suggestion of 4.7mH one is not gonna be used.

[Kleinstein]

I am not sure if the extra small caps at the shunt and the FB pin are actually needed. I added them before a found put the coupling was missing. One might get away with 100 pF each. The 10 Ohms are not in parallel to the shunt, but for an RC filter with the extra cap. If one needs it, depends on the layout and inductance of the shunt, so hard to tell from a simulation.

At 20 V (or high power in general) the SMPS seems to be a little sensitive to oscillation. So I would guess the compensation is not really good yet. Changing R9 for a lower drop makes things even more critical. Having a larger inductor could also change things. With the coupled inductors one has to be careful: they have to allow for a relatively high current before saturation. The cheap ones are often current compensated chokes - they only work well with the same current trough both coils and saturate fast otherwise.

For the filter caps, I used relatively small one to keep the speed of the simulation high (lack of patience). To dampen the high frequencies it is more like the small low ESR caps in parallel are as important and the large ones.

[VEGETA]

Here is where I searched for the coupled inductor: http://www.digikey.com/products/en/inductors-coils-chokes/arrays-signal-transformers/73?FV=d300001%2C11240026%2C1f140000%2Cffe00049%2C1d74007b%2C1d740142%2C1d74014c%2C1d74004a%2C1d740051&mnonly=0&newproducts=0&ColumnSort=1000011&page=1&stock=1&pbfree=0&rohs=0&quantity=1&ptm=0&fid=0&pageSize=25

I made output caps different, all 100uF with 1uF and 0.1uF caps for high frequency stuff. I could make then 220uF but this would be kinda too much right? However, there is still non-flat result even with these settings. The first filtering stage has 5x 100uF caps. Paralleling caps is much better than picking one big "beefy" 1000uF cap. output inductors are 10uF as you can see. How do you know that the circuit is about to oscillate or near that edge?

I couldn't find a better solution for making 1v dropout than adjusting R9 to 2.5K. Maybe because the loop itself is not clear to me, or more precisely how to calculate the required value. Which leads to the question why making it low value could damage the loop stability? since it sets the value.

[Kleinstein]

You usually don't want so large filter inductors: 1 st off they are big and expensive. They also make the response slow - to slow to have the feedback from behind the filter. This is why I choose the feedback from after the first filter.  With the unstable loop there will be the 300 kHz main clock and something like 10-60 kHz oscillation of the regulator loop. One needs to get rid of this second frequency by adjusting the feedback, not by filtering. The version I showed did that at least most of the time (except at more than about 30 W of power). So it likely needs some optimization with the simplified linear stage (this speeds up simulation).

The regulator loop gain for the SMPS is proportional to R12/R9  (older versions). There is a second feedback path via R13 /C26 (older version) - this is faster and may be needed for this reason. So R9 < R12 is problematic as this extra gain compared to direct feedback.

To test the SMPS loop, one can use a step function in the load current. I used something like a 0-1A step in addition to a little base load. The step response looked reasonably good (not too much drop one the load change) - so much of the loop is Ok. This makes me think the funny looking oscillation in the 10-50 kHz range could be due to current limiting or similar setting in, not just classical instability of the normal loop. Changing the compensation helps a little to reduce the oscillation (e.g. only with high power). Still this problem needs to be solved first - one we have a working SMPS you can add the full linear part. This could be still a long way to go.

There is a way to set the drop without effecting the look gain: this is by having the base of the transistor not going to GND, but may be a -1 V.

[VEGETA]

how did you know the rough number of 10-60KHZ? I remind you that the current frequency of the SMPS is 500KHz not 300. So did you do AC analysis or something? I didn't learn it yet.

the -1v can be taken from a diode to the battery - terminal like we did with the isolated supply right?

[Kleinstein]

The -1 V can come from the negative side of the isolated supply. Depending on the diode used it might be directly the negative supply, or a divider to GND.

The oscillation frequency depends a little on the filter used. I got something like a 10-50 kHz superimposed to the output when the SMPS loop is oscillating. In the last shown circuit the frequency is rather low (e.g. 4 kHz) as the filter caps are really large and the inductors quite large. The SMPS part was way better in the version I had attached. Also the filter caps in inductors were much more practical and the response to a current step was good. So nearly acceptable. One might be away with it by lowering the specs a little (e.g. add an extra 20 W power limit, so only 1 A at 20 V or <10 V at 2A).

AC analysis for the SMPS part is difficult. I only did the transients, but at different voltages (the higher voltages are more critical) and with a step in the load current (it is included in the circuit). As each run takes quite some time one can only do sample testing (e.g. 2 V, 6 V 10 V, 20 V). I started with a lower voltage as this is faster - it helps with a try and error search.

[VEGETA]

Lowering the specs is out of question (I thought about it before), originally I wanted something crazy like 50v/5A or so, but 20v/2A is nice and more than good enough for most people.

The -1 V can come from the negative side of the isolated supply. Depending on the diode used it might be directly the negative supply, or a divider to GND.

Pfff I misunderstood you there! I thought the output of Q2 not the base! the base is before the 0.1R shunt which is effectively ground. So yeah, from the isolated supply with a simple divider! resistor tolerance won't be a problem since it is not needed to be that accurate -1v.

The oscillation frequency depends a little on the filter used. I got something like a 10-50 kHz superimposed to the output when the SMPS loop is oscillating.

Well, I tried to figure out what that means and this is the result:

This is when it is 20v with 2A (10R load).



I zoomed on the output voltage and it is like this, I noticed that there are spikes in the waveform that are not like the rest of it. I know from some videos I watched that this shouldn't exist, the correct thing is a uniform clean waveform... thus I considered it to be the thing you said about 10-50KHz stuff. Is it correct?

Now for a closer look:



This is when it is 20v with 2A (10R load).

the image is for the output voltage but zoomed and focused on it when it is stable not in the ramping up stage. I measured the frequency of the blue one (red one is a little shorter on its zenith than the blue) and it is around 11.1K or something (don't remember correctly). Is this what you meant?

Now, you said lower voltages are good and could be a final circuit for them... I tried 5v to see the exact way I did with 20v and this was the close look on the waveform:



I guessed it is correct since the waveform is clean and let's say "homogeneous" unlike before! the ripple here is natural I guess since it is zoomed a lot and  there must be something like this.

___

^
Is my understanding correct here? I used my mind to think of what you said and I hope I learned something correct! 

when the SMPS loop is oscillating

how did you know the loop was oscillating? I mean is it from the waveforms like the ones I posted?

___

If my understanding and analysis is correct, then what means should be taken to fix the thing? taking the feedback from before all filtering? or make more filtering?

[VEGETA]

I re-changed the circuit according to your recommendations and a bit of what I understood and tried (see previous post), I came out with these changes:

1- The transistor base is now connected to a -1.13v instead of ground. the -1.13v is from using a divider (1K || 1.5k) from ground to negative isolated source. I did a bit of trials to achieve a true 1v dropout (tested it with 5v and 20v).

2- Put a 10nF+1kR from the FBX pin to OUT- as a filter, which eliminated that 10-50KHz component (if my understanding in the previous post is correct). Now even 20v output is very clean without that component. Even 30v is good but it is out of our spec of 20v max.

3- changed R10 from 10K to 1K for no obvious reason. I just thought that I already have high resistance in there due to the new divider as a source, so lowering R10 seemed good since Q2 is a BJT and needs current to open xD.

I haven't tried this on the full version yet, I just want your opinion.

THANKS!

[Kleinstein]

The extra filter (RC to "ground") at the FBX pins seem so have done the magic. There is only a little of the oscillation left during start up.

However with the small IRFP240, the 1 V drop seems to be too little as now it includes the shunt. On a load current transient (0-2A) there is a little of drop out. However this should be relatively easy to fix (use the divider form the shunt, instead of from GND). For 2 A the slightly larger IRFP250 might be the better choice if so little drop is wanted.

The SMPS part seem to run better with the 4.7 µH inductors. Due to the high current load one might need two of the 10 µH inductors in parallel anyway. Even than up to 20 A peak current is a lot and relatively close to saturation. One might be able to reduce the peak current with a larger current sense resistor a little.