Parallel (wired) shift registers

[Stonent]

I got to thinking about ways to use shift registers and had an idea which as far as I can tell, I can't find yet online.
I'm not saying that it isn't out there, it may be but since I can't seem to find it I'll run it by you guys and tell me what you think.

So lets take 2 or more 74HC595 shift registers and wire them in parallel where all the pins except Q(x) and Latch are tied together.

Then the MCU sends out the data and latches #1, then sends out the data and latches #2 and so on.

So all the shift registers are getting the data but only the latched one pushes it through and in theory shouldn't the other ones hold their previous outputs until latched again?

Assuming this would work, wouldn't it mean just needing one more pin each time you put a shift register in?

So is this a silly idea that would never work, a bad idea, or something that's been done a million times over and I just never was able to find it?

[rollatorwieltje]

So you want to daisy chain shift registers? That's common practice and doesn't even require an extra pin on your microcontroller. The 595 has a "serial output" pin that you just feed into the DS pin of the next 595.

See the second example on http://arduino.cc/en/tutorial/ShiftOut

Be aware that your update rate drops like a stone when you daisy chain them.

[Stonent]

So you want to daisy chain shift registers? That's common practice and doesn't even require an extra pin on your microcontroller. The 595 has a "serial output" pin that you just feed into the DS pin of the next 595.

See the second example on http://arduino.cc/en/tutorial/ShiftOut

Be aware that your update rate drops like a stone when you daisy chain them.

Well I guess that answers that. I'll have to read more about that pin then.

[Lurch]

So lets take 2 or more 74HC595 shift registers and wire them in parallel where all the pins except Q(x) and Latch are tied together.

Then the MCU sends out the data and latches #1, then sends out the data and latches #2 and so on.

So all the shift registers are getting the data but only the latched one pushes it through and in theory shouldn't the other ones hold their previous outputs until latched again?

Why would you want to do this?

[strangelovemd12]

[Rerouter]

I've used this chip just recently to do the same,

tie the shift clock, latch clock and output enable together, your micro feeds the serial in pin, and the next shift register is fed from D7S you then daisy chain this as long as you wish

you can do the same with most parallel in serial out shift registers as well

[MacAttak]

I got to thinking about ways to use shift registers and had an idea which as far as I can tell, I can't find yet online.
I'm not saying that it isn't out there, it may be but since I can't seem to find it I'll run it by you guys and tell me what you think.

So lets take 2 or more 74HC595 shift registers and wire them in parallel where all the pins except Q(x) and Latch are tied together.

Then the MCU sends out the data and latches #1, then sends out the data and latches #2 and so on.

So all the shift registers are getting the data but only the latched one pushes it through and in theory shouldn't the other ones hold their previous outputs until latched again?

Assuming this would work, wouldn't it mean just needing one more pin each time you put a shift register in?

So is this a silly idea that would never work, a bad idea, or something that's been done a million times over and I just never was able to find it?

Yes, it works fine. You don't necessarily need an extra pin for every new latching shift register. You can use decoders for that (for example 3-8 decoder like 74HC138 to use 3 pins to control up to 8 latching registers).

[Stonent]

So lets take 2 or more 74HC595 shift registers and wire them in parallel where all the pins except Q(x) and Latch are tied together.

Then the MCU sends out the data and latches #1, then sends out the data and latches #2 and so on.

So all the shift registers are getting the data but only the latched one pushes it through and in theory shouldn't the other ones hold their previous outputs until latched again?

Why would you want to do this?

The same reason anyone would use more than one shift register?

[Lurch]

The same reason anyone would use more than one shift register?

I meant why would you want to use them in parallel rather than the usual serial topology?

[MacAttak]

Well one reason would be because then you don't need to care about the clock train length. As you add more shift registers to the design, you are still loading any given one of them using the same number of clock pulses.

When you daisy-chain them, the train length is cumulative, and it will take progressively longer to load registers that are further down the chain. It takes three times as many clock pulses to load the third register as it takes to load the first one.

In parallel it becomes more like a write-only RAM... broadcast the full byte of data (assuming 8-bit registers), then set the address of the chip to be latched. Whether there is one shift register, or 64 of them, it still only takes 8 clock pulses plus the latch to load any one of them.

[Rerouter]

equally with most micros you can set the bits of the entire output port register in under 10 cycles (only 2 on a arduino uno), which means you get a lot more data moved per cycle, which if you are trying to get the most I/O at the fastest speed can be an ideal scenario.