Author Topic: Protecting gates and properly grounding P-Mos UPS circuit?  (Read 1705 times)

0 Members and 1 Guest are viewing this topic.

Offline RussboTopic starter

  • Newbie
  • Posts: 2
  • Country: gb
Protecting gates and properly grounding P-Mos UPS circuit?
« on: April 01, 2017, 07:57:59 pm »
Hi there.

I'm trying to put together a P-Mos UPS circuit to switch between a 5 cell lithium battery (16-21V usable range) and a 24V AC/DC power supply.

I found a design from an old post (https://www.eevblog.com/forum/chat/battery-backup-circuit/) that somebody found from the schematic for the Tinyduino. For a 5 and 3.3V pair of sources, this works great. However there are issues I'd have using this design with beefed up FETs:

1. I have a lot more potential in my circuit, if I pulled the battery FET to ground as this circuit does, I believe I would exceed the Vth of virtually any MOSFET and break it.

2. The circuit simulates well if I replace the 5V with a grounded 24/0V dc source. However, if I instead use a constant 24V source with a switch inline, when I break the connection (unplugging my power supply in the real world), I get a range of strange voltages between 13 and 17V instead of the expected 0V where the DC supply was disconnected and this is fed into the gate of the N Mosfet, turning it on when I don't want it on. Current still only appears to flow through from the battery to the load but I don't think this behavior is desirable.

I can stop pulling the DC fet to ground simply by connecting a zener between the source of the N mosfet and ground to limit the voltage to the DC fet gate to say, 10V instead of 0V.

I can't apply the same technique to the battery FET because it's using the DC supply to drive its gate and when the DC supply is removed, the only voltage there (should be) ground, so a zener won't work in this case.

The image of the original circuit and my attempt are attached. Really any method that would work I'm happy with, even if it means increasing component count, using an MCU etc. I don't mind. All help is much appreciated. Thanks!




« Last Edit: April 01, 2017, 11:45:42 pm by Russbo »
 

Offline EPTech

  • Regular Contributor
  • *
  • Posts: 168
  • Country: be
    • EP Technical Services
Re: Protecting gates and properly grounding P-Mos UPS circuit?
« Reply #1 on: April 02, 2017, 03:27:24 am »
Yes indeed,

Just put a zener of 15V with a series resistor of say 22k between source and gate and pull down the gate with another FET. That should protect your gates.

Your FET's are the wrong way round. The sources should be connected to battery and external supply. The drains should be connected to Vcc.

In case of the NTZD3152P, it already has ESD protected gates, just a series resistor will suffice.

Happy designing.
Kind greetings,

Pascal.
 


Share me

Digg  Facebook  SlashDot  Delicious  Technorati  Twitter  Google  Yahoo
Smf