Schematic -- one AND gate to mulitple outputs

[IveGotAPocket]

Hey guys I took a truth table and made 7 k-maps from it for all of my 7 outputs using only 4 inputs. Next i identified logic gates that appeared in multiple k-map SOP forms. Once that was done i started to make the schematic in diamond lattice.

My question is how i can i tie one AND gates output to multiple outputs..says 1,2,3 for example? -the 1,2,3 would correspond to lights on a 7-segments display.

I was not sure how to do this as connecting the wires directly is not working...i tried this bus tap which allowed me to connect the wire to output gives me weird output in my spreadsheet, so i know that is probably wrong.

Thanks for any help

[Thor-Arne]

You can use a diode on each gate output, the diodes can then be connected together.

If you're going to drive 7segment displays with AND gates, check that the LED's isn't drawing to much current for the chip.

[IveGotAPocket]

You can use a diode on each gate output, the diodes can then be connected together.

Thanks! i will go try that now

edit: the software I'm using doesn't seem to have a diode.

If you're going to drive 7segment displays with AND gates, check that the LED's isn't drawing to much current for the chip

I defiantly will do that. Is there anything that I'm not doing correctly or could be improved?

I will be running the display via a MachX02 board

[Thor-Arne]

I'm not doing FPGA's, but diodes is very commonly used in logic circuits so I assumed it was in there.
Perhaps there is another way to tie the outputs together, but I'm afraid someone else has to answer that.

[IveGotAPocket]

I guess that i will just start a new schematic and do it a longer route..was trying to use the least gates possible but i cant seem to find an answer to my question from any resource lattice diamond has that i can find. Dang

[Rerouter]

At an educated guess, you would have to use OR gates to accomplish it, but if you are doing this in an FPGA, dont they have a 4 bit mux or similar in there function blocks, allowing you to attack it that way over many, many and gates?

[T3sl4co1l]

Boolean addition is implemented with OR gates.  You can use diodes, but they kind of suck.. don't expect too much out of them!

Note you can complement all the inputs and use NAND gates for the maxterms, then NOR gates for the sums.  This is how it's implemented in real chips (PLDs etc.).

Tim

[IveGotAPocket]

Boolean addition is implemented with OR gates.  You can use diodes, but they kind of suck.. don't expect too much out of them!

Note you can complement all the inputs and use NAND gates for the maxterms, then NOR gates for the sums.  This is how it's implemented in real chips (PLDs etc.).

Tim

Word i see what your saying, thanks i will try that. I'm just gonna restart cause its good practice anyway