Yes, you're right, the circuit I was referring to is the one-shot monostable.
You need to analyse the circuit to work out the time delay.
Firstly, look at the stable state. The input is high and output low. The comparator +input is at half the supply voltage and -input at 0V.
When the input goes low, C2 is connected to 0V and the -input is briefly taken one diode drop below 0V, thus making the output go high as the +input is above the -input. The output remains high until C1 charges to half the supply voltage via R1, at which point the voltage across R1 will fall below half the supply voltage. The output will then go low, causing C1 to discharge very quickly through D1.
The point in time, at which the voltage across C1 reaches half the supply voltage is a function of the RC time constant R1*C1, which can be calculated using the formulae linked below:
http://en.wikipedia.org/wiki/RC_circuit#Time-domain_considerationsThe main issue with this circuit is if the trigger pulse goes high, during the timing cycle, the output will go low and the timer will be reset. This is because C2 will couple the high rising edge so the -input goes above the +input. Fortunately this can be solved by adding a few more components: D3 clips the input signal, ensuring it never rises above half the supply voltage,plus a diode drop, so as long as the input pulse isn't too short, it won't reset the timer, when it returns to positive.