Simple Inverting OpAmp circuit - I got something wrong somewhere... what?

[mike-k]

Hi,

I have a circuit which outputs a range of 0 - 4 V, adjustable via a controller. I want to adjust that range to be 0 - -8V.

I thought this would be a case of using an inverting opamp with 2x gain.

I have a TL072CN opamp, powered with +12V and -12V, with the input going into pin 2 via a 1K resistor. Pin 3 goes to earth. The output at pin 1 feeds back to pin 2 via a  2K resistor.

The output from pin 1 is always 0V. I guess I have misunderstood something pretty basic here?

Attached is the pinout for the TL072CN.

[Zero999]

That should work.

Have you properly connected the unused op-amp? Pin 7 should go to pin 6 and pin 5 to 0V.

[MikeK]

Simulate it in LTSpice and see for yourself:

[mike-k]

Nice. I must familiarise myself with LTSpice.

[mike-k]

Your comment prompted me to double check my wiring. There was a bad connection in the breadboard. It's working now.

I have a couple of more questions!

1. Apart from the ratio, is there any advantage to using large or small resistor values in this circuit? E.g. 100K & 200K vs 100R & 200 R

2. I now realise my requirement is to convert 0 - 4V range to -8V - 0. How might I introduce the -8V offset?

Thanks.

[ledtester]

A recent video on this very topic:

[MikeK]

You can *probably* 10x or 20x your resistor values, but they're really going to depend on your source and load impedances.  The video that ledtester posted is a good one to watch.

[mike-k]

Thanks guys, the video is very useful. As my requirement has changed from 2x inverting to 2x non-inverting + offset, I wondered if I can set the offset in a non-inverting circuit by providing the appropriate offsetting voltage to the negative input? Just as in the video example, which is an inverting circuit, the offset voltage is presented at the positive input?

Could be a nice example to get started with in LTSpice.

[Terry Bites]

Keep resistors  in the 10k -100k region for best performance. Low load resistance will affect output swing. The load resistance includes the feedback network. High resistance values in the FB loop increase offset and offset drift. Larger values add to amplifier noise as well.  See Maximum peak-to-peak output voltage versus load resistance on data sheet.  To get the voltage offset you need, use inherent summing properties of your configuration- . Think of the currents flowing in and away from the inv terminal. They must sum to zero.

https://www.electronics-tutorials.ws/opamp/opamp_4.html

[mike-k]

Thanks Terry, that and the linked tutorial should get me where i need to be...

[tonyh88]

Is this the result you want?

This is just a quick simulation and correct standard resistor values will need to be found and calculated but this can give an idea with just one opamp.

 You could also add an extra stage with a summing amplifier to add the offset after the gain stage if your opamp as multiple op amp in the same package.

V2 is your 0-4V input
V1 is the offset voltage = -4V

Gain of 4.

Green waveform is the input and blue the output

Hope this helps

[mike-k]

Brilliant, thanks. I just replicated the other Mike K's LTSpice circuit to work out how to use the software. Now I will reproduce yours. Looks to be exactly what I need.

[Zero999]

Your comment prompted me to double check my wiring. There was a bad connection in the breadboard. It's working now.

I have a couple of more questions!

1. Apart from the ratio, is there any advantage to using large or small resistor values in this circuit? E.g. 100K & 200K vs 100R & 200 R

Too lower resistor value will draw a lot of current from the source and even the op-amp's output.

The optimum values depend on the source impedance and the type of op-amp used.

Too higher value increases the noise and offset error due to the bias currents. All resistors above absolute zero, produce a thermal noise voltage, the higher the resistance, the higher the noise voltage. Op-amps leak a tiny current out of their inputs, which is known as the bias current. It's also noisy, thus establishing a noise voltage across the input resistors and its DC value introduces an error. The DC error can be minimised by ensuring the DC resistance seen by both inputs is equal, or fairly close, by connecting a resistor equal to value of the input and feedback resistors in parallel, in series with the non-inverting input. In the case of your original circuit, 1k||1k = 500R, so the nearest standard E24 value of 510R would do.

The type of op-amp used is important. The TL072 has J-FET inputs, so the bias current is tiny, along with any associated errors and noise, so you can get away with relatively high value resistors and ensuring the resistance seen at both inputs is less critical. An op-amp with BJT inputs, such as the NE5532 has a much higher bias current, as a considerable base current is required to bias the input transistors in the active region, so much lower value resistors are required.

For example, the TL072C has an input bias current of 100pA, worst case at 25^oC, which would develop 100nV across a 1k input resistor, much less than the input offset voltage specification of 3mV typical. The NE5532 has an input bias current of 800nA, worst case, at 25^oC, which would be 800µV, with a 1k input resistor, which is a bit higher than the offset voltage of 500µV. Note that in the circuit described in the original post, both the feedback and input resistors are 1k, giving 500R seen at the input, do the errors will be halved. Adding a 500R resistor to the non-inverting input will generate the same 400µV, in the case of the NE5532, at the non-inverting, as the inverting input and the op-amp only amplifiers the difference between its inputs, so it's no longer seen at the output.

Another thing to note is the input offset current, which is the difference between the bias currents out of each input. Even if the resistances seen on both inputs are equal, the error due to the offset current will still be there. For example if the input offset current is 100nA and the resistance seen by both inputs is 500R, the extra offset voltage generated will be 50µV.

https://www.ti.com/lit/ds/symlink/tl074h.pdf
https://www.ti.com/lit/ds/symlink/ne5532a.pdf