Troubleshooting NE555 Boost Converter with Feedback – LTspice vs. Real World Dis

[nurekosmita]

Hi everyone,
I am working on a simple Boost Converter based on the NE555 timer and an N-Channel MOSFET to step up a 3.7V - 4.2V (18650 Li-ion battery) to a stable 5V for an Arduino (max load current approx. 250mA). The circuit includes a feedback loop for voltage regulation.

I am specifically required to use the NE555 for this project, so I cannot switch to a dedicated boost controller IC.
I am facing several issues that I cannot explain:

• Simulation vs. Reality: In LTspice, the MOSFET shows a power dissipation of around 23W, which seems extremely high for this application.
• Inconsistent Behavior: The physical circuit worked initially, but then the output voltage jumped above 20V (likely a feedback failure). Now, after replacing all components with new ones, the circuit does not work at all.

Controller: NE555
Switch: MOSFET IRLZ44n
Input: 18650 Battery (~4.1V)
Target Output: 5V @ 250mA

Attached is the LTspice schematic for simulation and the KiCad schematic showing the actual physical layout and the MOSFET I am using.

I would appreciate any advice on how to debug this or if there are obvious flaws in my schematic.

[MariuszD]

I am specifically required to use the NE555 for this project, so I cannot switch to a dedicated boost controller IC.

The minimum supply voltage for the NE555 is 4.5V, so tell your teacher that the circuit cannot be built using the NE555. I guess that only at school could they come up with such an irrational requirement. 

Even if the NE555 oscillates below the minimum voltage, the output voltage in the high state will be too low for the IRLZ44.

The CMOS version of 555 could work at such a voltage, but this one has significant output resistance. Check on the oscilloscope how distorted the gate waveforms are.

The higher the voltage on the CV pin, the greater the duty cycle, meaning your system has positive feedback instead of negative feedback.

The 1N400x diode is too slow for this circuit.

[PGPG]

Even if the NE555 oscillates below the minimum voltage, the output voltage in the high state will be too low for the IRLZ44.

Specially if divided by 2 with R4,R5.

In LTspice, the MOSFET shows a power dissipation of around 23W,

In simulation:
Check what is MOSFETs Drain voltage when 555 output is high.
Check current in L1.

Edit later....
I was looking at first schematic only. After posting I noticed that R4,R5 from schematic in simulation are R3,R6 and have different values.

[Zero999]

The LTSpice schematic uses the wrong models which means the simulator will produce inaccurate results.

Download the correct model from the Internet if needs be. It will be in a plain text file format. Open it in a text editor. Select all of the text and copy it to the clipboard.

Start LTSpice.

Click the .t icon on the toolbar to insert a SPICE directive. Paste the model into the text box.

Now change the part number for the device to match the model name.

LTSpice uses a very simple behavioural ME555 model by default which doesn't model the output characteristics properly or the effect of the supply voltage. Attached is a model I made, which uses LTSpice's model, but adds transistors to its output to more accurately model the output stage.

[jwet]

The other issue is that boost converters need a large reservoir cap across Vin.  At your frequencies, this would probably be about the size of your output cap, perhaps as small as 1000uF- simulate.  When you simulate a battery in Spice, add some series resistance to it.  The output Z of an 18650 is 20 to 500 milliohms depending on quality and state of charge.  There is also series inductance- ESL.   Assume something like 150 milliohm for a middling cell.  This doesn't sound like a lot, but boost converters have high peak currents, in this circuit, you'll have peak inductor currents of about an amp.  You have this nice low Ron FET and a source that's .05 ohms.  Keep a big cap close to the 555 and the boost FET.  The ESL also creates droops and messes.  Keep the boost loop, input cap, boost inductor, FET and FET drive close together- this is called minimizing the loop area.

A CMOS 555 is a must, the old bipolar 555 just won't work as others have said above.

[nurekosmita]

Thanks for the feedback!

I’ve assembled the circuit on a home-made PCB. It is partially working now, but I’m seeing an output of only 4.52V with the Arduino connected. After a few seconds, the voltage drops further to about 4.48V, and the MOSFET becomes extremely hot. Regardless of the potentiometer setting, I cannot reach a higher output voltage.
I can also hear a high-pitched noise coming from the circuit, which suggests the NE555 might be oscillating. (I think so)

I have already ordered the CMOS version of the 555 timer. Do you think this will help, given the low input voltage?
What else should I modify to make this circuit reliable? Is it possible to save this design by changing component values? Also, would it be a better approach to connect two 18650 batteries in series (~8.2V) and convert the circuit into a step-down converter instead?

I’ve attached the updated LTspice simulation file, which now includes the specific SPICE models for both the MOSFET and the diode. I believe I have modeled them correctly, but I am not entirely sure.
I have also included a PDF of the full schematic for reference.

I’m finding this project very difficult and it's becoming really exhausting to troubleshoot , so I am really grateful for any help you can provide.

[PGPG]

Regardless of the potentiometer setting, I cannot reach a higher output voltage.

First you have to ensure that you have negative feedback. According how I imagine 555 works (I'm not using LTSpice so can't check what simulation says) you don't have. The higher 555 pin 5 voltage I expect higher PWM ratio so positive, not negative feedback.

I can also hear a high-pitched noise coming from the circuit, which suggests the NE555 might be oscillating. (I think so)

There is nothing wrong in 555 oscillating (this circuit needs 555 oscillating).
Magnetic field makes choke core changing its size. It is what you hear.
As you hear it that means 555 oscillates at acoustic frequency, or its work is unstable (positive feedback can be the reason) and it modifies its over acoustic base frequency with acoustic frequency.
I think that going with pin5 voltage close to IC supply lowers 555 frequency so it can be much lower than you set it with RC elements (I didn't checked their values).

and the MOSFET becomes extremely hot.

You should look with scope at the voltage at connection between MOSFET and L. I suppose it is not always switched on enough to keep its output low and there are times when its drain current is high together with its drain voltage not being close to 0V (so high power is dissipated in MOSFET).
Oscilloscope is must have and nowadays it is so cheap to have one. I was playing with electronic for many years (since I was 10) dreaming of having oscilloscope until (in age of 24) I have build one. I was so proud of my construction that I have send it to electronic magazine and they published it.

[mtwieg]

Yeah in your LTspice schematic, the feedback is positive (higher voltage at CV means higher duty cycle on OUT). Adding a logic inverter between OUT and the MOSFET's gate will give negative feedback. But you still won't get a regulated 5V output. For that, you need to compare the boost output voltage against a reference voltage (which the 555 does not provide) and amplify that difference before feeding that back to the 555 timer.

[MariuszD]

I’m finding this project very difficult and it's becoming really exhausting to troubleshoot.

This is not a difficult project to troubleshoot. You just haven't learned anything yet. On top of that, you ignored the fact that you have positive feedback.
If you want to learn, check in the simulation what voltage you have on the CV pin, think about what consequences that has. What voltage is on the gate, what is its duty cycle? How does the duty cycle depend on the voltage at the CV pin? How does the voltage of the boost circuit depend on the duty cycle?

School taught me a method to check whether the feedback is negative or positive:

You assume that the system was in a stable state and there is an increase in output voltage (e.g., due to a change in load). This increase causes an increase in voltage at the CV pin, which leads to an ... in the duty cycle, resulting in an ... in output voltage. If the final effect is opposite to the cause that triggered it, we have negative feedback.
... - type in increase or decrease


If you don't want to learn, just search for "ne555 nixie power supply" images on Google and copy the part with the transistor.

[Grandchuck]

Changed to negative feedback by adding an inverting amplifier.  Simulates OK with various load resistances.

[mtwieg]

Yes, now the feedback is negative. Though it's still going to have poor regulation.

I've modified the simulation to show this more clearly with line and load transients. First the line voltage is dropped from 4.1V to 3.6V, resulting in a 0.45V change in Vout. Then the load current is increased by 0.1A, resulting in 33mV change to Vout. Again, to get good regulation you need to compare Vout to a good voltage reference (which does not vary with line or load), and amplify that error and feed it back to the PWM modulator (the CV pin).

I also added D1, which helps prevent overshoot at the start of the simulation.

Are you trying to do this using a 555 as a learning exercise? If so, then by all means continue. But if you're simply trying to build a good boost converter then you should be using one of the many specialized pwm controller ICs.

edit: VVV lol I thought you were the OP

[Grandchuck]

Agreed.  Poor regulation.  Thanks for the improvements to the simulated circuit.

Is the OP still around?

[Zero999]

A proper voltage reference is required in order for this to work properly.

Are you allowed to use the TL431?

[D2236]

Here is a slight variation on the design which gives good results in LTS. The Vout plot appears "noisy," until you look at the scale. The p-p ripple under load is less than 5 mV, while the variation of the supply voltage has a minimal effect.

Circuit was later bench tested with 150 mA load in the first scope plots shown. The last picture is with pulsing both input supply voltage and load current up to 300 mA, testing worst case operation with min input voltage and max load current. There are many noises present from doing the test on a plug-in breadboard to save time. The 555 used was an old SGS (not CMOS) type I found in my parts.

[Seekonk]

Just tell the prof that no real designer would use a 555 for anything.  That should get you an A.

[PGPG]

no real designer would use a 555 for anything.

In 1988 we (Poland) were still communistic country with very limited access to electronic components.
In our first commercial product (Eprom programmer) I have used 555 to step up 5V (obtained from PC keyboard socket) to around 28V that was then linearly regulated to get VPP programming voltages (25V, 21V, 12.5V).

[D2236]

By adding some more feedback paths and one extra BJT it may be possible to improve on the overall regulation of the  previous circuit.

[MathWizard]

So D2236 in your circuit you regulate by shunting the current from the switching diode, away from the output. Overall that should be safer for the output, is that why you don't just try to reduce the gate driver itself, rather than shunt D2 away from the load ? IDK what the small signal model of this would look like, maybe that's better too, than attacking from the gate side?


I improvised a low power, all BJT, regulated boost converter w/ a diff-amp that could reduce the drive to the MOSFET gate circuit. I should try controlling the basic circuit from different points, and see which looks cleaner. I was going to solder up a version, but can't find my breadboard version, and I've taken a side-quest back into coupled ODE's and convolution again.

In LTSpice I've been pre-charging the output, I'll have to remember to do that w/ the real thing, so long as the regulation doesn't get wacky on startup.

[D2236]

So D2236 in your circuit you regulate by shunting the current from the switching diode, away from the output.

It may appear that way, but tying the 330R resistor to a separate 5.1 V seems not to affect the regulation with the avg output variation still around the 2 mV mark. The loop response gets a bit under damped from removing it from the output. In my HW proto, I had to increase it to about 910R to get good results. The MOSFET used in the proto is SIR662DP. I haven't tested the latest circuit to confirm the LTS results. 

[MathWizard]

Ok I missed that the feedback path is right from Q1's collector back to the CV pin also, I thought it was just to sink current to GND instead of allowing to reach the output, to regulate that way.

And if that was the only thing Q1 did, then I was wondering why not sink current / drop the voltage, of your gate drive network, to regulate that way (adding any stages to keep the phase right tho too).

[MrAl]

Hello,

The source of the confusion about the negative/positive feedback issue may have been caused by a possible error in one of the data sheets.
One of them had shown the output pulse width getting wider for a control voltage (CV) that goes lower.  That means if CV=1v the pulse widths would be wider than if CV=3v for example.
This seems like it was not correct.

The proper operation seems to be that with CV=3v we see a wider pulse width at the output terminal than we do with CV=1v for example.

I've included the 'corrected' data sheet section, but I do have to warn the readers that this correction has been verified using one of the spice models from TI and was not verified using any actual 555 timer IC of any kind.  To be absolutely sure we have the right data now, someone would have to test an actual 555 timer on a breadboard and verify the output pulse width does in fact get wider when the CV voltage goes higher.

Note that the position of the pulses get closer together when the CV voltage goes lower so the frequency goes up, but in most converters we rely on the pulse width getting wider not the frequency itself.

Perhaps the better way to use the 555 for this kind of application would be to use the 555 timer set up with the topology of an actual PWM circuit rather than the PPM circult.  It's slightly different.  It's a little doubtful if this will ever work though without a voltage reference of some kind and probably an op amp to use as the error detector.

Here is the diagram of one of the original 555 data sheets that shows the PPM circuit and the corrected waveforms.

[MrAl]

The LTSpice schematic uses the wrong models which means the simulator will produce inaccurate results.

Download the correct model from the Internet if needs be. It will be in a plain text file format. Open it in a text editor. Select all of the text and copy it to the clipboard.

Start LTSpice.

Click the .t icon on the toolbar to insert a SPICE directive. Paste the model into the text box.

Now change the part number for the device to match the model name.

LTSpice uses a very simple behavioural ME555 model by default which doesn't model the output characteristics properly or the effect of the supply voltage. Attached is a model I made, which uses LTSpice's model, but adds transistors to its output to more accurately model the output stage.

Hello there,

I don't think any of this will work at least not the way we usually want power supplies to work.  Usually we want load regulation AND line regulation.
The .asm circuit you posted can probably do load regulation, but it probably cannot do line regulation.  That may not be an issue if the input is always a constant DC voltage, but that's not always the case and usually isn't.

Check the circuit for input line regulation, from say 3.5v to 4.5v input, and if the output changes by nearly 1v (or even less) then it's not actually regulating.

For good regulation we usually need an error amplifier and voltage reference.  I was hoping that the 555 internal characteristics would act as a pseudo reference, but I don't think that's the case.  If not, we would most likely have to add a voltage reference diode and op amp or some other way to emulate an op amp.

[D2236]

Check the circuit for input line regulation, from say 3.5v to 4.5v input, and if the output changes by nearly 1v (or even less) then it's not actually regulating.

For good regulation we usually need an error amplifier and voltage reference.  I was hoping that the 555 internal characteristics would act as a pseudo reference, but I don't think that's the case.  If not, we would most likely have to add a voltage reference diode and op amp or some other way to emulate an op amp.

In the simulation, the input voltage (traces a bit dim on the dark background) gets pulsed between 3.6 V and 4.1 V, and at the same time the load current is pulsed from low up to 300 mA. My HW prototype performed very similar to the LTS results.

[MrAl]

Check the circuit for input line regulation, from say 3.5v to 4.5v input, and if the output changes by nearly 1v (or even less) then it's not actually regulating.

For good regulation we usually need an error amplifier and voltage reference.  I was hoping that the 555 internal characteristics would act as a pseudo reference, but I don't think that's the case.  If not, we would most likely have to add a voltage reference diode and op amp or some other way to emulate an op amp.

In the simulation, the input voltage (traces a bit dim on the dark background) gets pulsed between 3.6 V and 4.1 V, and at the same time the load current is pulsed from low up to 300 mA. My HW prototype performed very similar to the LTS results.

What circuit are you using?  You don't have to pulse anything, just run two simulations, one with high line and one with low line.  You don't have to change the load current either.  Keep it as simple as possible.

[MrAl]

Hello again,

Here is a formula for the fractional duty cycle of the output using the PPM circuit:

DutyCycle=(log((2*(CV-Vdd))/(CV-2*Vdd))*(RB+RA))/(log((2*(CV-Vdd))/(CV-2*Vdd))*(RB+RA)-log(2)*RB)

Note for the DutyCycle 0.1 is 10 percent, 0.2 is twenty percent, etc.
CV is the control voltage,
Vdd is the supply voltage,
RA is the top resistor value,
RB is the bottom resistor value.
Also note there will be some values of RA and RB and/or Vdd and/or CV that do not allow the circuit to work properly.  If the result is negative or complex, it's not workable with the values used.
This also illustrates the dependency of the duty cycle with the supply voltage Vdd.  It can cause as high as maybe 20 percent deviation with supply voltage range 3 to 4.5 volts.