Thanks to you and everyone else for the polite and helpful replies! Mainly I'm looking for a good way to separate real from fake, other than cutting open the package. I bought some cheap mosfets before I knew that they are so often faked. I've now cut some open, and they're definitely fake, they're marked as Infineon, but the die is tiny and definitely not the size of the real die. In fact my fakes have even smaller dies than most of the photos of fakes that I've seen!
Not a big deal I paid $15 for 50 assorted fake mosfets. I won't make that mistake again, I'll be ordering from digikey or Mouser from now on.
After some consideration, I'm thinking showing performance curves is too ambitious for the project I'm planning and I'm willing to settle for a few tests that will help people (including me) to quickly check if the FET is fake.
Also I wonder if anyone can tell me what my component tester is trying to convey. For a mosfet it shows a value for Vt and C. I'm assuming Vt is the gate threshold. I'm assuming C is some kind of capacitance test, but which? The tester is a cheap thing with crappy documentation, so I'm just left to guess. Any ideas?
Now, if you're a. not so much concerned with reproducing the complete list of datasheet specs and b. mostly interested in power switching transistors, there's quite a lot you can glean from one or two related tests...

The gate charge switching test can be performed two or three ways, and if a dual channel digitizing oscilloscope is handy, one can measure Qg, Ciss, Coss, Crss, Rds(on), y_fs, Vgs(th), Vdss, td(on/off), tr, tf and probably some other things. The equivalent circuit is common-source DUT, with switchable strong driver or low current CCS to the gate, and switchable load resistor, inductor or CCS to the drain.
The gate charge curve is measured with CCS drive, and either resistor or CCS load (if resistor, then R = V+ / Id; if CCS, then I = Id, with V+ and Id stated as parameters for the test). When Ig(on/off) is small, voltage drops on inductances and stray resistances don't matter, and the system is quasi-static: every bit of charge we move into/out of the gate, is another increment to the change in gate and drain voltages. Thus, Vgs and Vds are swept through real load conditions, and the rates (dV/dt) are proportional to capacitances (especially Crss).
When a drain load resistor is used, we can also measure y_fs, from the dVds / dVgs (transfer) slope.
When a drain CCS is used, we can also measure Coss. We use a small current, and a strong gate driver this time. Vgs is pulsed on, pulling drain to GND, then turned off sharply. Vds hovers near zero (actually it's pulled slightly negative, due to Crss), then rises at Id = Coss(Vds) dVds/dt. Since Id is constant, Coss is measured by the slope, dV/dt.
And of course we can measure Rds(on) when Vgs=Vgs(on) and Id is enough to measure a sensible Vds.
Note that for testing full load switching, the drain CCS must be quite large. Datasheets usually give an equivalent circuit using two identical devices, one strapped to fixed Vgs so that it acts as a current limiter. (Such "suicide biasing" is discouraged, and probably a real circuit would use a beefier MOSFET -- one with a wider SOA -- and source degeneration, and maybe active control as well, to stabilize the current.) This dissipates a lot of heat, and can only be done so slowly before one or both transistors blow up!
The main thing that varies with load current, is Vgs(plateau), so it's not a big deal to have full load current in a Qg test. Also, the main difference between a load resistor or CCS, is the slope of the plateau, which is flatter for the CCS. (Note that no real device has the square corners shown in the datasheet -- for whatever reason, it's become tradition to draw it in straight segments, but it is of course rounded over, real devices don't have cusps*. IXYS datasheets for example, I think tend to show real curves.)
*More specifically, real phenomena are infinitely differentiable, among other things.
The testing circuit, then, would have a couple of driver circuits, a supply voltage or a few, and probe points. Supplies can be continuous duty or pulsed (toss on some big capacitors and use just a few watts; heck, you could probably make a USB tester if you really want

). Scope probes must be carefully compensated. Scope is connected to computer and set to the ranges and settings required, and waveforms are downloaded for processing.
The scope could be integrated as onboard ADCs, with careful attention paid to the flatness of the analog front ends. Hack: an ideal differentiator could be used instead of, or in addition to, measuring the voltage directly, to get a more accurate slope reading.
Hmm, might be possible to do much of this with an MCU; the fast sampling for rise/fall is the biggest hurdle I think. Equivalent time sampling can certainly be used; if accurate timing can be generated internally, and if the internal ADC has a snappy S&H, that'll do; otherwise, some amount of this can be shifted outside as analog hardware.
Tim