Watchdog circuit with permanent reset

[Borstenhorst]

Im not sure if this is a beginner question and if Im in the right forum.

I fail to come up with a simple solution for the following application  :

An output signal (Watchdog OK) shall be high as long as a µC generates an alternating input signal. As this signal has to be generated by SW to make sense, the frequency is rather low (ideally configurable and somewhere between 10ms and 2s).

If the input signal stops to oscillate, the output shall be low and STAY LOW.
The input signal can be stuck at HIGH OR LOW, in both cases the output shall go low.

The watchdogs ICs I saw satisfy all my needs, except that they generate a reset pulse, instead of a permanent reset.
You know any off the shelf watchdog IC with permanent reset?

Retriggerable monostable multivibrators keep the output high if the signal is stuck at high. At least the ones I saw so far.

Some spooky 555 circuits might do the trick but I would prefer a low part count and ideally a single chip solution.

A small µC will do the trick but I somehow consider this as a dirty hack because I failed to come up with a better solution 

All signals are (0-5V).

Thanks a lot in advance!

[Siwastaja]

Maybe a stupid and simple series capacitor from the IO pin, then rectified by a diode, and stored by a capacitor, with added pulldown resistor which discharges the capacitor if the pulsing stops. A schmitt trigger buffer would make the signal edge clean.

[Borstenhorst]

Great idea!  Many thanks for that!
Adjustment of the timeout could happen via a Potentiometer which is discharging the second capacitor.

However, I guess I will go with a small µC as watchdog. This simply gives the best results and the part count is low.

[mikerj]

Retriggerable monostable multivibrators keep the output high if the signal is stuck at high. At least the ones I saw so far.

You could AC couple the trigger.  However you can buy a single chip solution for exactly this purpose e.g. MAX6369–MAX6374 will allow you to configure a number of discrete timeout value via three pins.