Which transistors need matching in an op-amp

[sahko123]

For practice reasons I am designing a discrete op-amp and wanted to know what transistors need matching in this differential stage and if it would work in practice. There is no mad frequency requirements just dc to around 25 or 30khz. I've not yet added the voltage or current gain stages. Vcc=15v Vee=-15v

[Mr Evil]

If it's just for practice then you don't need to match any transistors at all. Matching Q1 and Q2 will help reduce DC offset, and slightly reduce distortion. Matching Q5 and Q6 will slightly improve the balance of current in the two halves. Matching Q3 and Q4 will do nothing, as there is no benefit to that current mirror's input and output currents being precisely equal. You could improve temperature stability by thermally coupling pairs.

[sahko123]

so ultimately the current mirrors above and below the diff pair wont affect distortion. I want the output of the diff pair to be at zero if the inputs are both pulled to ground i.e. no difference=output zero to make a dc coupled amplifier that wouldn't have any dc offset on the output. Would the dc offset 'just disappear' the closer matched the diff pair (Q1 and Q2) is?

[magic]

Q1,Q2 need to be matched for Vbe at equal Ic.
Q1,Q2 beta may need to be matched if there is significant source impedance.
Q5+Q6 base currents drawn by Q1 need to be matched by VAS base current drawn by Q2.
Q5,Q6 would ideally be matched for Vbe though R2,R3 help mitigate mismatch.

Failing any of that is likely to produce DC offset, unless multiple effects cancel out. SPICE is your friend

Transistors from one production batch are often Vbe-matched to a few mV out of the box.

edit
Note that this stage has limited common mode input range at both rails. Moreover, configured as voltage follower, the opamp will exhibit "phase reversal" when IN+ is taken to VCC.

edit edit
And phase reversal will break down the BE junction of Q1. Any excessive differential voltage will damage one of Q1,Q2; the typical solution is to have antiparallel diodes clamping the inputs to each other.
All of this assumes a typical inverting VAS, which also means that IN+ and IN- on your schematic are backwards if you consider the final, complete opamp.

[Mr Evil]

In addition to matching the transistors, to get the lowest possible DC offset you need to match the source impedance seen by both inputs, as the input bias current generates a voltage across those impedances. You'll never get exactly zero offset though - if your application demands it, you might need a way of trimming the offset.

As you're just trying to learn, I would recommend building the cuircuit without matching anything, measure its performance, then match transistors etc. and see what happens.

[TimFox]

If you take the output of this circuit from the junction of Q2 and Q5 collectors, the DC voltage is indeterminate, since the two transistors form a current source.  Normally, that output would drive a low-impedance node, such as the base of a common-emitter amplifier, and that would set the voltage at that node.  With perfect matching, the net current into that node should be negligible, but perfectly-matched Q5 and Q6 devices will not match perfectly since the operating conditions are somewhat different.  If you were to add offset balancing, you could evaluate this test circuit with a reasonable (1 k?) resistor to "ground" from that node, but if the two inputs are near ground then the collector of Q2 will not be happy, with zero voltage between the collector and base.

[magic]

If you take the output of this circuit from the junction of Q2 and Q5 collectors, the DC voltage is indeterminate, since the two transistors form a current source.

It will be OK once you apply feedback. The old µA723 works that way.
Bigger problems are that the output voltage can only be higher than common mode input voltage and gain isn't that high.