Modern IC processes used for FPGAs and other high performance logic are not going to be suitable for general purpose programmable outputs.
Could you explain?
I wouldn't think FPGA processes would be all that applicable to MCUs, which I guess are usually 3.3V through and through. Then again, there are plenty available in the >100MHz class with that sort of architecture (~1V core, bank IO), so it depends what you're referring to I guess.
Ultimately I should suppose the highest-falootin' FPGAs are very similar to the highest-falootin' processors, but those are all GTL or whatever, which I expect isn't far from the stuff the core is made of. But yeah, that's all special fancy low voltage stuff, hardly the crusty high voltage stuff we like for embedded.
Drive strength for instance applies to saturated operation (except for current mode outputs) and is for controlling transmission line effects.
Isn't that the same thing?
Usually what's done for a CMOS current sink/source is, either just running it flat out -- you get a lot of resistance near the rail, but eventually it comes out of the resistive range and becomes constant-ish current. This usually takes more than half the supply voltage, so it's not exactly useful. But that already helps "transmission line effects", where it goes up a little bit right away, then even more slowly as the TL charges. Instead of jamming it over and causing big bounce, or whatever.
A real current limited output should drop the gate voltage a little, usually as a current mirror. Which could be switched on and off, but that might be slow; or cascoded, which would take a lot more area (the CCS will already have to be bigger to get the same Rds(on) or equivalent at the reduced Vgs, plus the switch).
So it really shouldn't be too big of a deal, but it would take more area, and a lot more nuts and bolts to make it useful. Should be the same on any process, just scaled by the volts/amps of whatever is typical of it..
Output voltage ranges are very limited unless a much more expensive IC process is used and even then, they are still limited.
Well, you put it in a 3.3V IO bank and get 3.3V ranges, or etc. Typical of FPGAs, at least the non-high-falootin' ones. I haven't even checked if the fanciest ones have 3.3V banks or not.. wouldn't be surprised if they don't, at least on the high speed banks or whatever.
Having a high voltage bank would definitely be hard work in most processes. Like a 15V (or even +/-15V) section among 3.3V (or lower) logic. The transistors would also be massive, probably easily bigger than the rest of a chip that size (referring to like 250nm scale processes).
Out of, like, a 5V chip (most ATMega/PIC stuff people dick around with..), it needn't be much harder than the rest.
Tim