One to watch: Open Source USB protocol analyser

[GeoffS]

Open source USB protocol analyser project

It's just a project idea at this stage but might be worth keeping an eye on for several reasons.
Other than the plan to use an XMOS processor and a Xilinx FPGA, there's no hardware details.

One  thing I found interesting is that it's already got a lot of funding even prior to a design being published, this is pretty unusual.

[Hypernova]

Those who would use such a thing tends to have deeper pockets than the average hobbyist.

The component choice makes sense. Instead of being limited by the CPU that can fit on an FPGA use an entirely separate one.

[GeoffS]

I've had an occasional need to do some USB sniffing when developing software but the cheapest analyser I've seen is about $1400.
Way outside my budget.

If it ends up costing in the order of $100 then I think they'll have a winner.

[mikeselectricstuff]

I don't quite understand why they are looking for such a large amount of funding for what essentially should be  a board with an FPGA and some memory on it...

[GeoffS]

The more money they have up front, the more resources they can devote to the project.
Apart from the hardware design, they have to produce the software as well.

Another use for the money is so they can make and sell the completed boards at a reasonable price. Bare boards will also be offered as well as the files to make your own.

[The last project I saw of this scale, in money terms, was the push to open source the Blender graphics software. This was closed source and when the company producing it went out of business, the open source community raised over 100,000 euros to get the rights to the source code and technology. Today its a free package]

[Hypernova]

I don't quite understand why they are looking for such a large amount of funding for what essentially should be  a board with an FPGA and some memory on it...

Doing multiple prototyping runs of 4+ layers boards is not cheap, you look at what you get for the donations and you can see that they are doing what ever they can to push PCB batch volume.

There's also the fact that the higher dollar donations are basically pre orders.

[mikeselectricstuff]

I don't quite understand why they are looking for such a large amount of funding for what essentially should be  a board with an FPGA and some memory on it...

Doing multiple prototyping runs of 4+ layers boards is not cheap, you look at what you get for the donations and you can see that they are doing what ever they can to push PCB batch volume.

There's also the fact that the higher dollar donations are basically pre orders.

Agreed but not _that_ expensive  - how many iterations do they need? Prototyping something like this shouldnt cost more than a couple of K of out-of-pocket costs,
Maybe it's just me but I'd not be comfortable taking money for production orders before I had something  pretty close to a finished  prototype.

[Hypernova]

I don't quite understand why they are looking for such a large amount of funding for what essentially should be  a board with an FPGA and some memory on it...

Doing multiple prototyping runs of 4+ layers boards is not cheap, you look at what you get for the donations and you can see that they are doing what ever they can to push PCB batch volume.

There's also the fact that the higher dollar donations are basically pre orders.

Agreed but not _that_ expensive  - how many iterations do they need? Prototyping something like this shouldnt cost more than a couple of K of out-of-pocket costs,
Maybe it's just me but I'd not be comfortable taking money for production orders before I had something  pretty close to a finished  prototype.

Well, they didn't ask for that much either, the donations were a lot more than they anticipated.

and



From wiki

OpenPandora began taking pre-orders for one batch of 4000 devices on September 30, 2008[2] and after manufacturing delays, began shipping to customers on May 21, 2010.

And that was 300USD, they didn't even case or pcb design at first.

 

And they still haven't finished making and shipping the first batch.

[Mechatrommer]

Agreed but not _that_ expensive  - how many iterations do they need? Prototyping something like this shouldnt cost more than a couple of K of out-of-pocket costs,
Maybe it's just me but I'd not be comfortable taking money for production orders before I had something  pretty close to a finished  prototype.

i'm not sure about prototyping cost (which i agree that multiple K is too high, maybe the development kit is included in the price/donation ), but according to them/he/bushing, they have done something about it, so it seems the prospect is high at producing a working unit. and i agree with "taking money for production". if the argument is to be able to bulk order for lower parts cost, why dont they finish up with one working prototype first, show its really working, and start asking pre-order money? and later make the bulk order. well... i dont know, just rambling around.

[GeoffS]

The money they have solicited/collected is not for production orders, it's for the development of the device.

If you're in the $500-$1000 donation category you do get one of the finished units, if and when they are actually made. The lower categories of donation will get a blank PCB.

[mikeselectricstuff]

The only way this should cost anywhere near the $17K they  asked for would be if they are paying someone to do development and/or getting an expensive commercial assembler to build 1-off prototypes- the actual hardware dev costs shoud be a small fraction of that.

[tyblu]

USB 3.0 can burst up to 5 Gbps using 2 full duplex lines, according to the great Wiki. The two 2.5GHz signals will have to have to be treated as RF with important frequency components up to 10x their switch frequency, or 25 GHz. Maybe some of this cost covers a VNA? The device inputs will have to have a broadband match up to 25 GHz, or at least have a match characteristic simple enough for which to compensate. Seems wonderfully difficult to me! Wish there was more info available, but the project was only opened on Kickstarter a week ago.

I have the DangerousPrototypes $45 Open Logic Sniffer, but it only samples at 16x70MHz (which is fantastic, by the way), not 2.5 GHz. (I wonder, though, with hardware buffers, 16x70MHz could be made into 2x560MHz.)

[mikeselectricstuff]

USB 3.0 can burst up to 5 Gbps using 2 full duplex lines,

But we're talking about USB2, not USB3 - 60Mbytes/sec isn't a particularly big deal

[GeoffS]

I'd guess that most of the development money is going into software as this will be a bigger component of the design.
Perhaps the intention is to employ some programmers part/full time?

[tyblu]

Ah, I see the "USB 1.1/2.0" bit now.
I think you're right, Geoff: "We are looking at additional features that we had to drop originally to meet the initial budget." Features normally cost nothing but grey hairs to open, home made designs, but it takes part of their budget. (Good!)

[As an aside, I know that one should consider digital lines at 10x their switching frequency when laying out power paths and signal traces (keep traces less than 1/10 of a wavelength), but what about when you're trying to take the TL effects into account? Do you really need all components within 10x (9x or 11x, really, as even components are 0) its switch frequency, or can you just match up to 5x (2nd fundamental)? ie: Is the 10x rule of thumb just for avoiding TL effects in PCB layout, or is it even more generalized, applying to RF design? Yeah, I know, go to RFCafe already...]

[GeoffS]

It also seems as if they are looking at I2C and SPI sniffing in the initial release rather than a later option.
Hope they don't spend too much money developing 'custom casing that will make the outside of OpenVizsla look as awesome as the inside'. We LIKE having bare boards lying on the desk  

[allanw]

[As an aside, I know that one should consider digital lines at 10x their switching frequency when laying out power paths and signal traces (keep traces less than 1/10 of a wavelength), but what about when you're trying to take the TL effects into account? Do you really need all components within 10x (9x or 11x, really, as even components are 0) its switch frequency, or can you just match up to 5x (2nd fundamental)? ie: Is the 10x rule of thumb just for avoiding TL effects in PCB layout, or is it even more generalized, applying to RF design? Yeah, I know, go to RFCafe already...]

I've been reading Howard Johnson's books and they've been very informative. I believe this is my understanding of his material:

For digital signals, what you need to worry about are the rise/fall times of the signals, as these are the actual high frequency content of your digital signals. He says: "Most energy in digital pulses concentrates below the knee frequency: 0.5/Tr", where Tr is the rise time. "The behavior of a circuit at the knee frequency determines its processing of a step edge. The behavior of a circuit at frequencies above Fknee hardly affects digital performance"

But then the question arises as to what the rise time of USB3 signals are. I don't know.

[tyblu]

[Moved asides to new topic to avoid hijack.]