KickStarter: CHC5 Open Camera System

[RoadRunner]

Hello to all


I have designed CHC5 Open Camera system around Zynq 7000 SoC

Availalbe on Kickstarter 1st week of September

https://www.kickstarter.com/projects/circuitvalley/chc5-open-machine-vision-programmable-industrial-camera

Here is part 2 of multiple parts series

https://www.circuitvalley.com/2026/08/chc5-open-camera-system-modular-machine-vision-ai-fpga-hardware-accelerated-advance-camera.html









Open to all feedbacks.  Than you for your time.

[Zucca]

Seems high quality stuff.

Given I am a beginner in cameras and sensors, what would you suggest for a trinocular stereo microscopes for electronics rework?

Example for the:
https://www.eevblog.com/forum/reviews/qianli-gorilla-6558-trinocular-stereo-microscope-6-558x/

Thanks.

[SamElectronics616]

Great work!.
I really need this.

[scopeguy27]

This is a proper chunk of engineering - putting the Zynq to work on the image pipeline instead of shuttling frames to a CPU is where cameras like this get interesting. Curious how you split the work: is the ISP chain done in fabric with the ARM cores handling control and interfaces, or the other way round? Open tooling for machine vision hardware is thin on the ground, so having the HDL and board files out in the wild is genuinely useful for people hacking industrial cameras on a hobby budget.

[RoadRunner]

This is a proper chunk of engineering - putting the Zynq to work on the image pipeline instead of shuttling frames to a CPU is where cameras like this get interesting. Curious how you split the work: is the ISP chain done in fabric with the ARM cores handling control and interfaces, or the other way round? Open tooling for machine vision hardware is thin on the ground, so having the HDL and board files out in the wild is genuinely useful for people hacking industrial cameras on a hobby budget.

ISP Runs fully under FPGA controlled over Zynq , Zynq does not have enough CPU power to do anything meaningful with Pixel data. only Ethernet GigE Data goes through CPU but that is absolutely zero copy with Multiple DMA , This is how it all done.