6‑Layer HDI PCB Stack‑up: How do you pick the right one?

[Brave166]

Not all 6‑layer HDI boards perform the same. Your stack‑up choice affects performance, manufacturability, yield and final cost.
Quick overview of four common real‑world structures:
🔹 Simplified 1‑Step HDI (1+4+1)
Single lamination, no buried vias. Low cost, good yield. Great for cost‑focused consumer electronics.
🔹 Standard 1‑Step HDI (1+4+1 with buried vias)
Double lamination. Higher wiring density, solid signal integrity. Workhorse for mid‑high end hardware.
🔹 Non‑Standard 2‑Step HDI (1+1+2+1+1)
Cross‑layer blind vias layer 1‑3. Very complex fabrication, expensive, lower yield. Only use when cross‑layer connections are unavoidable.
🔹 Any‑layer HDI
Maximum routing flexibility and signal integrity. Top‑tier for high‑speed /high‑frequency designs.

Practical tip:
If your design rules allow, moving from standard 1‑step (with buried vias) to simplified single‑lamination 1+4+1 can cut costs significantly with minor performance compromise.
Stack‑up selection always comes down to balancing three factors: performance, manufacturability and cost. Bad stack‑up choices show up later: low yield, longer lead‑times and unexpected signal issues.

Curious: What’s your go‑to 6‑layer HDI stack‑up for most projects?

[lichurbagan]

In practice, how much of the cost saving comes from eliminating the buried vias versus reducing the number of lamination cycles? I’d also be curious how you decide when the routing limitations of the simplified stack-up become unacceptable.

[jovelyngentallan02]

For a six-layer design that needs HDI, I’d start with 1+4+1 and check whether it provides enough room for BGA escape routing before adding more complexity. The package pitch, pin count and available routing channels would drive that decision.

One point I’d qualify is “maximum signal integrity” for any-layer HDI. It offers more routing freedom, but the result still depends on reference-plane continuity, dielectric selection, impedance control and how layer transitions are handled. Removing buried vias also needs a routing review before assuming the performance impact will be minor.

PCBWay’s HDI capabilities and stack-up overview is a useful starting point for discussing the build with a fabricator. I’d confirm the actual via spans, dielectric thicknesses, via filling requirements and total lamination cycles before routing—“one-step HDI” doesn’t necessarily mean one press cycle overall.

Getting quotes for two manufacturable alternatives early would make the cost comparison much more useful than choosing from the stack-up labels alone.