Are these power traces a "star topology"

[Dmeads]

I am laying out my first 4 layer board (signal+power, GND, GND, signal+power).

This is a hobbyist project AFE for a single lead ECG. The ADC (MCP3202) I am using calls for the power routing to be a "star configuration" and for the power traces to be at least 2 times the width of the signal traces.

I have included pictures of my top and bottom layers (with and without silk screen). The top_no_silk.png has the power ports labeled.

Is this power layout a "star configuration"? (I think this means every Vin has a direct path back to the voltage source -- nothing is in "parallel" so to speak)

Any other tips would be helpful as well!

Thank you!

[thm_w]

You can find the layout tips on their site:

https://ww1.microchip.com/downloads/aemDocuments/documents/MCU08/ApplicationNotes/ApplicationNotes/00688b.pdf
https://www.microchip.com/en-us/product/mcp3202

[temperance]

What you've got is a two return trances carrying some current to power the amplifier and the ADC to a common reference point and the noise across the common return paths is coupled into the ADC input.

This doesn't qualify as a star GND network. The purpose of a star GND network is to avoid coupling return currents into your signal path. Your PCB layout does the opposite and promotes coupling of return currents into the signal path.

A GND plane on both sides of the PCB will be a better solution as it also provides shielding for the very high impedance inputs.

Maybe some common mode chokes will be required for the DC/DC converters.

[thm_w]

Good video about star grounds for you: