MSOP clearances for Seeed Studio

[HackedFridgeMagnet]

Just trying to get my layout right so Seeed can manufacture my board.

According to Seeeds design rules I don't think they can technically manufacture footprints for MSOP devices.
But on the other hand I am sure they do it every day.

I just want to get my clearances right so my board is ok.

Attached are:
my proposed pad arrangement.
the relevant part of the Data sheet for the  LT3652
seeed studios design rules.

Is my proposed layout a fail, or is it ok, or could I improve it? Maybe making the solder mask width 4mil would be ok, but I don't want to go to the limit of their tolerances if I can help it.

I think I could possibly make the pads longer and thinner than the data sheet.

I guess the rule that confuses me is 'Min solder mask clearance'. Is this just the clearance between two bits of solder mask or the clearance between solder mask and copper?

[Mechatrommer]

its about the same as iteadstudio they used the same fab house anyway from what i read i keep my limit to 0.31mm so there's no problem to meet their 0.15mm limit. now to your footprint is 0.65mm pitch there should be no problem but why the pad is so 0.42mm thick it will be very close to each other, calculating its 0.65 - 0.42 = 0.23 well, no problem but wait, pin to power (center) pad is (5.23 - 2 x 0.889 - 1.651) / 2 = 0.9mm epic fail! reduce size of those pad(s) very ok!.

[HackedFridgeMagnet]

thanks for the input.

0.9mm separation should be ok shouldn't it.

i keep my limit to 0.31mm

Is that a copper separation distance of 0.31mm?

But how much  margin do you use around the copper for the solder mask? Any?

[Mechatrommer]

0.9mm separation should be ok shouldn't it.

bum! 0.9 sometime looks like 0.09 to me! that what happen to me when calculating while typing. 0.9mm should be very ok!.

i keep my limit to 0.31mm

Is that a copper separation distance of 0.31mm?

i guess separation means clearance? if so, yes.

But how much  margin do you use around the copper for the solder mask? Any?

no or i'm not yet aware of how to specify that in diptrace. it automatically created for me

FWIW attached are my diptrace design rule setting last time i edited based on itead's rule (3rd pic), i hope i didnt miss something as i already sent my 1st board to them, hope it will not screwed, i also learning. i need to recheck those rules thouroughly again. if you set those rules in your eda, it should be able to warn you about this.

[HackedFridgeMagnet]

It looks like a nice interface DRC in diptrace. but It doesn't seem to specify the clearance I am interested in.

I might just set it to the 3.2mil in my diagram. It doesn't seem to do much.

[Spikee]

I had some breakouts made for the MCP4728 MSOP-10 at itead and they got out fine on all the boards.

[Mechatrommer]

It looks like a nice interface DRC in diptrace. but It doesn't seem to specify the clearance I am interested in.

if its about mask clearance, i can see there's option when exporting to gerber. its mask sweel and shrink i believe you'll be interested in mask swell, its defaulted to 0.1mm, i think its clearance to the copper pad.

[HackedFridgeMagnet]

Yes it defaults to about 0.1mm in Kicad too. But if I use that then there isn't enough room for the pads and the min solder mask width.

Consequently I have made some adjustments, I will reduce the copper width a little, reducing the solder mask clearance around the pads to say 0.05mm from the default and having the solder mask thickness at about 0.2mm which is about the minimum.

pin pitch = copper pad + gap + mask + gap

0.65 = 0.35 + 0.05 + 0.2 + 0.05 (mm)

I will give this a go.