STM32 PCB/schematic review request please - first time

[shakedown]

Previously I have only had boards made which used existing blue/black pill boards and just some connections, these were very simple boards with tracks and vias only. They turned out fine but this time I am trying to make my own STM32F411CE board which I can program and blink an LED (D1). Please could anyone tell me if what I have done so far is fine or not? I ran the Electrical and Design rules checkers in KiCad and there is 1 warning and no errors and ignored tests like MCU Pad 49 not found, that is only because I used an existing kiCad symbol and assigned a footprint from stm32's website. The warning is for "K" not being connected, that is for later.

The second layer is meant to be entirely ground which can be connected to using via(s). The board will be programmed using SWDIO/SWCLK and powered using a 12V supply, I will use a small buck converter to step down to 3.3V. I am specifically concerned with the placement of decoupling capacitors. The datasheet is not very clear for the power supply to me - Page 60 (https://www.st.com/resource/en/datasheet/stm32f411ce.pdf). So I copied from other examples.

I tried to upload actual kiCad files but it won't let me so I have attached pictures. I am not an electrical engineer so this does not come naturally, I am trying to learn as a hobbyist. Thank you.

[tooki]

I tried to upload actual kiCad files but it won't let me so I have attached pictures. Thank you.

You just need to Zip them first. But leave the images; not everyone will have KiCad installed, nor want to open it just to view the project basics.

[tooki]

As for the layout: the crystal area is not very good. The traces from MCU to crystal should be kept as short as possible, and you want the ground pads to be connected to ground by their own nearby vias, not via a circuitous, shared route. (When using a ground plane, you generally just dip straight down onto it.)

[shakedown]

As for the layout: the crystal area is not very good. The traces from MCU to crystal should be kept as short as possible, and you want the ground pads to be connected to ground by their own nearby vias, not via a circuitous, shared route. (When using a ground plane, you generally just dip straight down onto it.)

Thank you I will make these adjustments.

[negativ3]

With the amount of board space you have available, I'd go for 0603 footprints to make hand soldering easy.

[pcprogrammer]

As a hobbyist hand soldering my boards, I stay on 0805, and have not had problems with my designs yet. Made several STM32F103C8T6 based boards, for which the hardware does not differ that much from a STM32F411 based one.

Attached is the schematic for a rotary encoder board I designed, and it shows a more readable schematic than what the OP made. Traceability and flow of signals is easier to understand and follow. The board for it is only 35mm x 35mm.

There is a copper ground plane on both sides of the board and a lot of via stitching. The crystal, only 8MHz here, is very close to the MCU with the loading capacitors on each side. With short traces and the crystal being ok with it, the 47 ohm resistor in the output of the oscillator is probably not needed, and makes it easier to keep the traces short. I have not used such a resistor in any of my STM32F103 boards and they work fine. Can't recall if any are used on the F411 dev boards I bought.

Hope the images give a bit of an idea on designing a better board for your F411 MCU.

[PGPG]

+3.3VA arrow suggests this voltage is used somewhere else at schematic but I can't find.
K label also suggests it is connected to something what I also can't find.
You have 5 100n capacitors at schematic suggesting they will be used at 4 uC pins. That is one too many, unless it is intended to serve as a decoupling capacitor for some other pad.
Then you use them at only 3 pads (pad 24 has no its capacitor). Assigning two 100nF capacitors to one pad gives you really nothing.
Pads 1 and 48 being next to each other can make do with a single, shared capacitor. So 3 100nF destined for uC would be enough. This doesn't mean you can not use 100nF in some other places at your PCB.
Two ceramic capacitors with different values (C11,C12) connected very close to each other gives you a frequency with very poor blocking (resonance between their parasitic serial inductance). The probability of interference occurring at precisely this frequency is low, yet it remains a potential source of problems. If you connect that way a small ceramic capacitor and bigger electrolytic problem doesn't exists because of high ESR of electrolytic (resonance has low quality factor so you don't get frequency with high impedance).
If it happens SW1 not having well contact with any of its 1,3 pins then BOOT0 state will be not established. It is better to have this state set to stable state even if mechanic elements are not working as intended. You will quicker find the problem if state is stable but not as you expect than if state is not stable.

[pcprogrammer]

Having the switch to set boot0 is even useless in this setup. There is no USB or UART connection to the outside world so programming has to be done via SWD in both cases. Tying boot0 to ground is simplest in this case.

Making boot0 high also requires PB2 to be at a defined level to select one of two startup modes.

[shakedown]

Thanks all. I have made the following changes. What do you think now?

1. The board is now smaller. I have increased the capacitor and resistor sizes to 0805 for hand soldering. I am not going to hand solder the MCU so if the price difference isnt much between machine soldering the MCU as well as the remaining components I might revert back to smaller size. That way I can make the board even smaller.

2. Removed R8 47 ohm resistor at the output of the oscillator.

3. Removed C6 100nF capacitor as it does not serve any other purpose. C10 is now a shared capacitor between pad 1 and 48. Should I remove C5? I don't know why other examples have a big capacitor with the smaller decoupling capacitors.

4. Each 3.3V pad has its own capacitor but 3.3V is connected together under the MCU like pcprogrammer's GND traces seem to be under the MCU. Is this okay?

5. Oscillator is closer to the MCU.

6. Boot switch is now just a header on which I will use a jumper instead if I want to boot into bootloader. I make mistakes sometimes for example not selecting serial debug in cube mx and end up in a state where once programmed, I cannot reprogram the MCU so I need boot0.

7. Removed the separate circuit for 3.3V analog supply (3.3VA). pcprogrammer, I think this is what you have done for MCU pad 9 (VDDA) too in your schematics (yellow circle in the picture below). So C11 and C12 are removed.

8. All the VSS and GND pads for the capacitors are now connected to GND using their own Vias.

@pcprogrammer, I note from your schematic that you don't place a larger capacitor with the decoupling capacitors, many other examples I have seen do. Could you help me understand why some do this? @PGPG is it because of what you said about small ceramic capacitor and bigger electrolytic problem doesn't exists because of high ESR of electrolytic?

[pcprogrammer]

1. The board is now smaller. I have increased the capacitor and resistor sizes to 0805 for hand soldering. I am not going to hand solder the MCU so if the price difference isnt much between machine soldering the MCU as well as the remaining components I might revert back to smaller size. That way I can make the board even smaller.

When the MCU is to be soldered by the PCB manufacturer, it won't be that more expensive to have them solder the other smd components too. The headers will most likely raise the cost more if manual labor is needed for it. But a 48 pin lqfp is not that hard to solder. Just solder a single corner pin first and make sure the alignment is correct. The solder a pin from the opposite corner. Now the part is fixed in place and you can solder the remaining pins.

4. Each 3.3V pad has its own capacitor but 3.3V is connected together under the MCU like pcprogrammer's GND traces seem to be under the MCU. Is this okay?

I have a ground plane on both sides of the PCB and the ground traces you mention are part of that plane. Due to EasyEDApro not connecting the MCU ground pins automatically I use traces to make these connections.
Having the power traces under the MCU should not be a problem, but I would recommend using thicker traces for power. When you look at the top side of my board you can see that I use a lot wider traces for the 3.3V. It depends on current needed through them, but having wider traces also reduces on inductance.

5. Oscillator is closer to the MCU.

There is still room for improvement. Try moving the components around a bit to make the traces shorter and have less bends.

6. Boot switch is now just a header on which I will use a jumper instead if I want to boot into bootloader. I make mistakes sometimes for example not selecting serial debug in cube mx and end up in a state where once programmed, I cannot reprogram the MCU so I need boot0.

This makes no sense to me. With the SWD interface it should always be possible to program the MCU. In case of issues all that is needed to get it done is connect while the MCU is held in reset. SWD should be active no matter what in that case. (maybe when a special fuse has been blown, but that would screw up way more)

7. Removed the separate circuit for 3.3V analog supply (3.3VA). pcprogrammer, I think this is what you have done for MCU pad 9 (VDDA) too in your schematics (yellow circle in the picture below). So C11 and C12 are removed.

I only use such a filter setup when I plan on using the ADC of the MCU. Otherwise I just connect it to Vcc with it's own decoupling cap.

8. All the VSS and GND pads for the capacitors are now connected to GND using their own Vias.

Adding a top layer ground plane does not cost extra and improves on shielding and ground impedance.

@pcprogrammer, I note from your schematic that you don't place a larger capacitor with the decoupling capacitors, many other examples I have seen do. Could you help me understand why some do this? @PGPG is it because of what you said about small ceramic capacitor and bigger electrolytic problem doesn't exists because of high ESR of electrolytic?

In my schematic there is a bigger cap in the 3.3V power supply and with such a small board that is enough.

This is a difficult topic to address, on when, where and why to add more capacitance to your schematic. I'm no expert on it either.

[gamalot]

I don't seem to see a pull-down capacitor connected to the reset pin (NRST).

[PGPG]

I don't know why other examples have a big capacitor with the smaller decoupling capacitors.

In ancient times (80s, TTL, THT) standard was to use 100uF electrolytic per 5..10 TTL ICs and 10nF ceramic per each IC.
Why 100uF - to have enough charge to limit supply voltage fluctuations when supply current changes (not current pulses during state change but general current consumption change in different state).
Why 10nF - to supply charge for current pulses during state changes. The bigger capacity than 10nF had poor dielectric and were more expensive. They have to be as close as possible to IC as in other case long connection tracks with their inductance ruin possibility of supply high current pulses to IC.

Modern IC consumes higher current pulses and in meantime 100nF very low ESR and ESL ceramic capacitors became available so 10nF was replaced with 100nF.
But you still need to have bigger charge reservoir so you need bigger capacitor. It need not to be close to IC. When uF ceramic capacitors became available (not so long ago) people noticed the problems of resonance between parallel connected high quality capacitors with different capacity (new problem not existing before).

Digital ICs datasheets are sometimes written by programmers having zero analog knowledge. I have seen in one WIZNET IC datasheet the blocking capacitor described then in table as that you need to use 100.1uF capacitor 

[pcprogrammer]

A better look at the schematic shows a nice possible fault. The new boot0 setup with the two pin header. When open the board will work. When closed the board will show smoke when the 3.3V supply is powerful enough.

This also means that the board will never function as intended because it will always start in a non user flash mode. It depends on what state is seen on PB2 which mode will be used.

[shakedown]

I don't seem to see a pull-down capacitor connected to the reset pin (NRST).

It doesn't have one, I will put one in. 

[shakedown]

I don't know why other examples have a big capacitor with the smaller decoupling capacitors.

In ancient times (80s, TTL, THT) standard was to use 100uF electrolytic per 5..10 TTL ICs and 10nF ceramic per each IC.
Why 100uF - to have enough charge to limit supply voltage fluctuations when supply current changes (not current pulses during state change but general current consumption change in different state).
Why 10nF - to supply charge for current pulses during state changes. The bigger capacity than 10nF had poor dielectric and were more expensive. They have to be as close as possible to IC as in other case long connection tracks with their inductance ruin possibility of supply high current pulses to IC.

Modern IC consumes higher current pulses and in meantime 100nF very low ESR and ESL ceramic capacitors became available so 10nF was replaced with 100nF.
But you still need to have bigger charge reservoir so you need bigger capacitor. It need not to be close to IC. When uF ceramic capacitors became available (not so long ago) people noticed the problems of resonance between parallel connected high quality capacitors with different capacity (new problem not existing before).

Digital ICs datasheets are sometimes written by programmers having zero analog knowledge. I have seen in one WIZNET IC datasheet the blocking capacitor described then in table as that you need to use 100.1uF capacitor 

Thanks for the thorough explanation, not that I completely understand all of it yet but I will. 

[shakedown]

A better look at the schematic shows a nice possible fault. The new boot0 setup with the two pin header. When open the board will work. When closed the board will show smoke when the 3.3V supply is powerful enough.

This also means that the board will never function as intended because it will always start in a non user flash mode. It depends on what state is seen on PB2 which mode will be used.

Yes you are right, incredibly silly mistake on my part, I will fix it with three pins; one for gnd, one for 3.3 and one for boot. I will also make the suggestions you suggested in your earlier post. Thanks.

[shakedown]

1. The board is now smaller. I have increased the capacitor and resistor sizes to 0805 for hand soldering. I am not going to hand solder the MCU so if the price difference isnt much between machine soldering the MCU as well as the remaining components I might revert back to smaller size. That way I can make the board even smaller.

When the MCU is to be soldered by the PCB manufacturer, it won't be that more expensive to have them solder the other smd components too. The headers will most likely raise the cost more if manual labor is needed for it. But a 48 pin lqfp is not that hard to solder. Just solder a single corner pin first and make sure the alignment is correct. The solder a pin from the opposite corner. Now the part is fixed in place and you can solder the remaining pins.

This is how I usually solder SO8 components however I need more practice. I will definitely solder the headers myself, that is easy.

4. Each 3.3V pad has its own capacitor but 3.3V is connected together under the MCU like pcprogrammer's GND traces seem to be under the MCU. Is this okay?

I have a ground plane on both sides of the PCB and the ground traces you mention are part of that plane. Due to EasyEDApro not connecting the MCU ground pins automatically I use traces to make these connections.
Having the power traces under the MCU should not be a problem, but I would recommend using thicker traces for power. When you look at the top side of my board you can see that I use a lot wider traces for the 3.3V. It depends on current needed through them, but having wider traces also reduces on inductance.

I have increased the 3.3V track width from 0.2mm to 0.4mm because it looked double in your board view and the 12V is now 0.5mm. Although the trace going to pin 48 from under the MCU needs to stay at 0.2mm otherwise it causes clearance errors during DRC checks.

5. Oscillator is closer to the MCU.

There is still room for improvement. Try moving the components around a bit to make the traces shorter and have less bends.

I have moved the oscillator slightly closer to the MCU and turned it so that the traces can be straighter.

6. Boot switch is now just a header on which I will use a jumper instead if I want to boot into bootloader. I make mistakes sometimes for example not selecting serial debug in cube mx and end up in a state where once programmed, I cannot reprogram the MCU so I need boot0.

This makes no sense to me. With the SWD interface it should always be possible to program the MCU. In case of issues all that is needed to get it done is connect while the MCU is held in reset. SWD should be active no matter what in that case. (maybe when a special fuse has been blown, but that would screw up way more)

Maybe I remember it wrong then but I do remember having an issue where I could not reprogram through the stm32IDE so I think I used STM32Programmer and set the boot jumper to the other position to get it to read, erase and reprogram.

7. Removed the separate circuit for 3.3V analog supply (3.3VA). pcprogrammer, I think this is what you have done for MCU pad 9 (VDDA) too in your schematics (yellow circle in the picture below). So C11 and C12 are removed.

I only use such a filter setup when I plan on using the ADC of the MCU. Otherwise I just connect it to Vcc with it's own decoupling cap.

I will add these later then if I use ADC.

8. All the VSS and GND pads for the capacitors are now connected to GND using their own Vias.

Adding a top layer ground plane does not cost extra and improves on shielding and ground impedance.

Something I am looking at how to do now in KiCad.

@pcprogrammer, I note from your schematic that you don't place a larger capacitor with the decoupling capacitors, many other examples I have seen do. Could you help me understand why some do this? @PGPG is it because of what you said about small ceramic capacitor and bigger electrolytic problem doesn't exists because of high ESR of electrolytic?

In my schematic there is a bigger cap in the 3.3V power supply and with such a small board that is enough.

So I will leave a 4.7uF capacitor in the circuit now.

This is a difficult topic to address, on when, where and why to add more capacitance to your schematic. I'm no expert on it either.




For boot0, I have now implemented three pins, a jumper will either set the pin to high or low. I have also added a pull down resistor and small capacitor to the NRST pin as @gamalot suggested, I guess this will prevent erroneous resets due to noise if NRST pin is not connected because I never really use it with ST link. You also mentioned in reply#7 that PB2 needs to be set to a state. Thanks.

Edit: I am also now confused, the reference manual tells me the NRST will cause a reset when set to low:

"System reset
A system reset sets all registers to their reset values unless specified otherwise in the
register description.
A system reset is generated when one of the following events occurs:
1. A low level on the NRST pin (external reset)"

Every time I have programmed a black pill (STM32F411), I have never connected the NRST to the ST-Link so it must mean it is pulling this pin up on the board?

[pcprogrammer]

Remove the pull down resistor on the reset pin. It is indeed active low, and the 10k ohm might be lower than the internal pull up in the chip, making it unpredictable. The capacitor on the reset line is to delay the lifting of the reset on power up. This way the MCU has a more deterministic start.

The blackpill does have a pull up resistor on the reset line, but there is also one in the MCU itself. I normally add one any way to make sure the startup timeout on the reset is long enough for Vcc to become stable.

On the subject of loosing the ability to program the MCU via SWD, I had an issue just last week. In the STM32F103 series there is an quirk when modifying the AFIO MAPR register that makes it that the SWD interface is disabled, even though the setting is for disabling the JTAG interface and partially remapping timer 3 pins.

This made it that I could not program the flash with the stlink programmer while only the SWDIO and SWDCLK line were connected. It needed the reset line to bring the MCU in reset state to allow the SWD connection to be made. It was then possible to re program the flash. On a bluepill the SWD connector does not have the reset line, but holding the reset button while making the connection will also do.

No need to switch back to using the boot0 pin to set the MCU in programming mode, which also means hooking up a serial to USB converter on a bluepill. The blackpill (F411), if I recall correctly, allows for programming via USB in this mode.

[Alien Brother]

Maybe I remember it wrong then but I do remember having an issue where I could not reprogram through the stm32IDE so I think I used STM32Programmer and set the boot jumper to the other position to get it to read, erase and reprogram.

I'm pretty sure at some point I ran into the same issue that CubeIDE did not respect the "connect under reset" setting and could not program the chip that re-configured the SWD pins. But CubeProgrammer worked.