Has anyone achieved an optimal USB 2.0 layout on USB C SMT/Hybrid connectors?
4 layer board I'm retrofitting to (signal/ground/power/signal), so would like to keep the USB 2.0 differential pair top side as much as possible
USB C documentation states:
"The receptacle side shall support the USB 2.0 differential pair present on Dp1/Dn1 or Dp2/Dn2. The plug orientation determines which pair is active. In one implementation, Dp1 and Dp2 may be shorted on the host/device as close to the receptacle as possible to minimize stub length; Dn1 and Dn2 may also be shorted. The maximum shorting trace length should not exceed 3.5 mm."
I like the look of this connector for mechanical robustness, as it has a staggered set of rows of through hole pins along with an SMT row; Wurth 632723100011 (or clones).
However; all the processor / hub reference boards from various vendors I've found so far for this part would appear to fail this maximum shorting trace length, meaning in one or both orientations there will be a significantly longer stub on one or both of the USB 2.0 Dp/Dn signals. A TI AM243 reference board I found has the record so far, at around 8.5mm.

The only one I think is compliant is this crafty creation from Microchip (
https://support.microchip.com/s/article/USB-Type-C-Layout-Recommendations) - but theirs results in the USB Dp/Dn on the opposite side of the board. At first sight you think "why not just remove the via and route topside?" but then you realise it ends up heavily asymmetric in one cable orientation due to only one wire in the through hole case being routed through a via and the through hole (so 2x PCB heights difference). The vias and opposite side routing ensure in each case there is precisely one Z hop.

Is this overthinking? It irks me to go against the USB C published spec, though it seems others have had little second thought in violating it...!