Soldermask bridge tolerances for manufacturers

[VEGETA]

Hello,

I use PCBWay and previously they wanted at least 0.22mm clearance between pads solder mask in order to be ok with their manufacturing or they won't put soldermask there... I tried once without soldermask and it worked nicely but still a short could occur at certain units.


I faced a similar issue with my new design using AP62600 which pads are about 0.25mm and in between distance will be less than 0.22mm.

Instead of changing the SMT pad width of the footprint, I thought why not reduce the soldermask expansion and solder paste a little but while keeping the copper below the same? and it worked with them.

This thread is about if my choice was good and correct? or I better reduce the pad size? I thought reducing pads will lower thermal performance and would maybe create some other issues.

I attached the picture of old vs new footprint. the grey on top of red is the solderpaste layer, the mask expansion is same size.

for your opinions.

[thm_w]

https://ww1.microchip.com/downloads/en/Appnotes/doc8583.pdf
https://electronics.stackexchange.com/questions/126719/solder-mask-and-pad-area-smd-vs-nsmd

You are effectively making a solder mask defined pad. This is OK for BGA, but might be risky for QFN.

Are you saying a solder bridge did occur on some units you built? Did you take any photos, was that with a paste mask or hand soldered?

[VEGETA]

https://ww1.microchip.com/downloads/en/Appnotes/doc8583.pdf
https://electronics.stackexchange.com/questions/126719/solder-mask-and-pad-area-smd-vs-nsmd

You are effectively making a solder mask defined pad. This is OK for BGA, but might be risky for QFN.

Are you saying a solder bridge did occur on some units you built? Did you take any photos, was that with a paste mask or hand soldered?

why risky for QFN?

I didn't solder it myself but all with PCBway, I assume they use automated machine fore this since it is very small part... but sometimes I feel they do hand solder sometimes.

However, when going production batch even a small one, it should be pick and place machine and so on.

therefore in order to avoid any issues in the future I thought of shrinking the mask a bit (with paste) to ensure no bridge ever happens... and still there is space for the part to sit on and get soldered.

EDIT: just confirmed with them, sample boards like these are soldered by hand but production batch will be soldered with pick and place machine.

[thm_w]

If PCBway is manufacturing it and hasn't complained, I probably wouldn't bother tweaking.
You can look at how TI has recommended their solder mask defined VQFN package if you want: https://www.ti.com/lit/ml/mpqf446a/mpqf446a.pdf?ts=1693430203276


https://www.eevblog.com/forum/eda/solder-mask-bridge-between-qfn-pads-how-important/
https://www.ti.com/lit/an/sloa122/sloa122.pdf?ts=1693429698585&ref_url=https%253A%252F%252Fwww.google.com%252F
Your similar question from before: https://www.eevblog.com/forum/eda/pcbway-issue-with-qfn-solder-bridge-what-to-do/

[VEGETA]

looks like I did "solder mask defined pad" method.

PCBway told me this issue and informed me either I change the footprint\pad settings or they won't make a solder mask bridge. However, they told me 2nd method can cause bridging of solder.

therefore, I wanted to be 100% sure now and in the future and went with the mask shrinking method which they checked and said it is ok now.

I won't be having the boards to test when they are finished in manufacturing batches but rather shipped to shipping company, thus want to make sure nothing ever is bad or can cause anything. the boards are power supply, which they at pcbway can test easily with a power cord and multimeter but still ensuring no room for error is always best.

I just wanted to ask if anyone faced such a thing before and if my way of dealing with it was correct, since I acted by myself from my own thinking without resorting to anything else.