Altium: Via tenting in thermal pad

[Tinus]

Hi everyone,

EDIT: Apologies this should have been in the Altium section.  I accidentally posted it in the parent forum.

I'm busy designing a board using the TPS63020DSJ which has a 14-lead PSON package.  I've added through hole pads (also tried vias) on the thermal pad. 

Now my problem is that when viewing the Gerber files, the solder mask covers the vias in addition to the rest of the pad, but I don't want the solder to flow into the vias.  I've tried various things, including the "force tenting on top/bottom" setting on the vias but this also doesn't work.  It looks like the thermal pad settings are overriding the via's settings.

I'm sure this has been done before, could someone please shed some light on how to accomplish this?

Thank you and regards
Tinus

[Precipice]

I'm not sure you can (or should) do this.
If you want to plug vias, soldermask isn't the right thing - you want to be screening epoxy into the holes. Dots of soldermask, poorly held onto the top of open vias, in an area you'll be stencilling solderpaste - sounds like a recipe for trouble)
I'd also question whether you actually want to plug the vias in a thermal pad? Giving the solder an escape route tends to let the chip sit flatter and closer to the PCB. There's a risk of solder balls appearing on the back of the board - bit if you give them a bit of copper to spread out onto, that works nicely.
I've done this a few times, and X-rays show good attachment.

(but to actually answer your question - I don't think that Altium allows positive soldermask, just negative. Or, at least, I've never seen it).

[Tinus]

Hi Precipice,

Thank you for your reply.

My first thought was to fill with epoxy but the assembly house recommended to rather tent the vias as they have had problems with the epoxy.  I will have to take this up further with the assembly house.

[Precipice]

It's definitely worth checking to see if you can just thieve the solder through the vias onto the back of the board.
(Although TI's suggested layout does seem to like a lot of vias, doesn't it. Hmm)
I guess you could do something with carefully placed fills, lots of rectangular areas where the vias aren't, if you do want to try this tenting lark - but it still feels brave. I bet your assembly and board shops won't promise you the tenting will hold.

[Rufus]

Now my problem is that when viewing the Gerber files, the solder mask covers the vias in addition to the rest of the pad, but I don't want the solder to flow into the vias.  I've tried various things, including the "force tenting on top/bottom" setting on the vias but this also doesn't work.

Ignoring questions about it being a good thing to do or not the only semi-automated way to generate a solder mask pattern is to pour a copper polygon around the footprint vias in the PCB editor then move the polygon to the resist layer and copy and paste it into the footprint. The footprint thermal pad and vias need to be set tented.

[Spikee]

It is also possible to leave the via's untented. Add little squares in the paste mask so there will be a limited amount of solder paste on the pad.

When you reflow, there is so little solder flowing that the via's should be free.

[T3sl4co1l]

Now my problem is that when viewing the Gerber files, the solder mask covers the vias in addition to the rest of the pad, but I don't want the solder to flow into the vias.  I've tried various things, including the "force tenting on top/bottom" setting on the vias but this also doesn't work.

Ignoring questions about it being a good thing to do or not the only semi-automated way to generate a solder mask pattern is to pour a copper polygon around the footprint vias in the PCB editor then move the polygon to the resist layer and copy and paste it into the footprint. The footprint thermal pad and vias need to be set tented.

Ewwwww...

So what happens when you Repour All Polygons?  You have to redo each and every one?

A "convert to region" would lock the outline, don't think that works on polys though.

Another method would be: fully tent the pad and vias, and draw the soldermask openings manually.  Use circles around the vias, and fill (with traces or regions or fill or whatever) between the circles and perimeter.  An ugly hack.

Soldermask is only logical-OR, so you can't subtract a tent from an already open region, you must do some BS way like this.

Or, preferably... just leave it be, because that's usually better.  I've heard tenting is bad because the vias trap gas, which gets released during soldering, causing voids.  Also better to provide a path for solder to move, as mentioned above: you can even use purposely sized vias to wick excess solder away from the pad, so the device sits at the correct height for all pads.

Tim

[Rufus]

So what happens when you Repour All Polygons?  You have to redo each and every one?

I just played with it a little thinking the recent improvements to polygon management might have made this method impossible but it hasn't. A solid polygon pour around vias on a copper layer needs to be exploded to primitives which turns it into a region which can be moved to any layer. Regions can't be re-poured and it would be a component primitive anyway.

I think in previous versions moving or pasting a poured polygon to a non-copper layer turned it into a region. Now poured polygons unpour themselves as soon as you touch them so exploding to primitives is required, or maybe it always was required.

Also better to provide a path for solder to move, as mentioned above: you can even use purposely sized vias to wick excess solder away from the pad, so the device sits at the correct height for all pads.

Or all the solder wicks down the vias leaving none on the component pad - probably depending on what heats up first. I have had boards with the above image built. The only problem was a few solder balls coming through the vias to the other side of the board. I don't know what the best solution is other than having the vias properly (and expensively) plugged.

[T3sl4co1l]

I try to dimension vias (diameter and count) so that the amount of solder wicked (if they fully fill) corresponds to the amount added using a full paste pad over the recommended partial paste pattern.

Tim

[tszaboo]

I would try to delete the thermal pad from the pcblib and manually place one. Also, if the holes are smaller than 0,3mm there will be very minimal solder lost. USually you dont even need to cover the whole pad with paste, depends on the stencil thickness (most engineer just ignores or fails to understand the importance of the stencil thickness.)

[RetireMeNow]

Yep I know this post is 10 years old but it's still relevant today...

I am trying to achieve the exact same outcome. Thermal pad and tented vias on the top side, open on the bottom side. I have a double sided component board so ending up with tiny solder balls on the reverse side where another component may be sitting is not ideal. The point of leaving one side open is to avoid trapped acids eating into into the via barrel over time.

Of course I have run into the same problem in that the thermal pad opens up the solder mask irrespective of the tenting state of the vias. My solution is a little time consuming but does works:

1) Create an outline for the thermal pad on a mech layer (that includes any solder mask expansion you want)
2) Copy this outline and the vias into a PCB document (I call it a scratch pad)
3) Create a keepout -> full circle that corresponds to the tenting size over the vias that you want
4) Place these keepouts on the vias that you bought through (the vias are handy to locate the keepouts)
5) Using the thermal pad outline on the mech layer,  Convert -> Create polygon from Selected primitives and change to solid and move to top layer
6) Convert -> Explode polygon to free primitives
7) Change to solder mask layer
Copy back to footprint

I try and keep the vias and thermal pad design symmetrical where possible as it speeds up the process.

Advantages of this process:
- No solder paste down the via holes creating solder balls etc on the other side
- No extra fabrication cost for filling of vias
- No starving the thermal pad of paste because it's all disappeared down the holes
- No acid trapped in vias because they are open on one side so leftover acids should in theory get cleaned out

Disadvantages:
- The small dots of solder mask may cause problems with not staying attached although this depends on the size of those dots, smaller dots = higher risk
- Takes a little extra time

A really good read up on this and other options is attached. Their solution is all good and well if you have the room, but commonly you don't.
 
Feedback welcome